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https://github.com/espressif/esp-idf.git
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9a6de4cb3e
On riscv chips accessing cache mapped memory regions over the ibus would result in an illegal instructions exception triggering faster than the cache error interrupt/exception. Added a cache error check in the panic handler, if any cache errors are active the panic handler will now report a cache error, even if the trigger exception was a illegal instructions.
93 lines
3.1 KiB
C
93 lines
3.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_macros.h"
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#include "soc/soc_caps.h"
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#include "sdkconfig.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern bool g_panic_abort;
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extern char *g_panic_abort_details;
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extern void *g_exc_frames[SOC_CPU_CORES_NUM];
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// Function to print longer amounts of information such as the details
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// and backtrace field of panic_info_t. These functions should limit themselves
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// to printing to the console and should do other more involved processing,
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// and must be aware that the main logic in panic.c has a watchdog timer active.
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typedef void (*panic_info_dump_fn_t)(const void* frame);
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// Non architecture specific exceptions (generally valid for all targets).
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// Can be used to convey to the main logic what exception is being
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// dealt with to perform some actions, without knowing the underlying
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// architecture/chip-specific exception.
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typedef enum {
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PANIC_EXCEPTION_DEBUG,
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PANIC_EXCEPTION_IWDT,
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PANIC_EXCEPTION_TWDT,
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PANIC_EXCEPTION_ABORT,
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PANIC_EXCEPTION_FAULT, // catch-all for all types of faults
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} panic_exception_t;
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typedef struct {
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int core; // core which triggered panic
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panic_exception_t exception; // non-architecture-specific exception code
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const char* reason; // exception string
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const char* description; // short description of the exception
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panic_info_dump_fn_t details; // more details on the exception
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panic_info_dump_fn_t state; // processor state, usually the contents of the registers
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const void* addr; // instruction address that triggered the exception
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const void* frame; // reference to the frame
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bool pseudo_excause; // flag indicating that exception cause has special meaning
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} panic_info_t;
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#define PANIC_INFO_DUMP(info, dump_fn) {if ((info)->dump_fn) (*(info)->dump_fn)((info->frame));}
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// Create own print functions, since printf might be broken, and can be silenced
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// when CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
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#if !CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT
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void panic_print_char(char c);
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void panic_print_str(const char *str);
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void panic_print_dec(int d);
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void panic_print_hex(int h);
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#else
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#define panic_print_char(c) ESP_UNUSED(c)
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#define panic_print_str(str) ESP_UNUSED(str)
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#define panic_print_dec(d) ESP_UNUSED(d)
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#define panic_print_hex(h) ESP_UNUSED(h)
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#endif
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void __attribute__((__noreturn__)) panic_abort(const char *details);
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void panic_arch_fill_info(void *frame, panic_info_t *info);
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void panic_soc_fill_info(void *frame, panic_info_t *info);
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bool panic_soc_check_pseudo_cause(void *f, panic_info_t *info);
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void panic_print_registers(const void *frame, int core);
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void panic_print_backtrace(const void *frame, int core);
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uint32_t panic_get_address(const void* frame);
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void panic_set_address(void *frame, uint32_t addr);
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uint32_t panic_get_cause(const void* frame);
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#ifdef __cplusplus
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}
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#endif
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