mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
1178 lines
35 KiB
C
1178 lines
35 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "esp_random.h"
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#include "esp_heap_caps.h"
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#include "esp_heap_caps_init.h"
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#include <esp_mac.h>
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#include "sdkconfig.h"
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#include "nimble/nimble_port.h"
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#include "nimble/nimble_port_freertos.h"
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#ifdef ESP_PLATFORM
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#include "esp_log.h"
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#endif
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#if CONFIG_SW_COEXIST_ENABLE
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#include "esp_coexist_internal.h"
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#endif
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#include "nimble/nimble_npl_os.h"
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#include "nimble/ble_hci_trans.h"
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#include "os/endian.h"
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#include "esp_bt.h"
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#include "esp_intr_alloc.h"
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#include "esp_sleep.h"
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#include "esp_pm.h"
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#include "esp_phy_init.h"
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#include "soc/syscon_reg.h"
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#include "soc/modem_clkrst_reg.h"
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#include "esp_private/periph_ctrl.h"
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#include "hci_uart.h"
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#include "bt_osi_mem.h"
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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#include "hci/hci_hal.h"
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#endif
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_sleep.h"
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#include "soc/syscon_reg.h"
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#include "soc/dport_access.h"
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/* Macro definition
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************************************************************************
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*/
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#define NIMBLE_PORT_LOG_TAG "BLE_INIT"
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#define OSI_COEX_VERSION 0x00010006
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#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
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#define EXT_FUNC_VERSION 0x20221122
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#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
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#define BT_ASSERT_PRINT ets_printf
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
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#define ACL_DATA_MBUF_LEADINGSPCAE 4
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#endif
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/* Types definition
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************************************************************************
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*/
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struct osi_coex_funcs_t {
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uint32_t _magic;
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uint32_t _version;
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void (* _coex_wifi_sleep_set)(bool sleep);
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int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
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void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
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void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
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};
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struct ext_funcs_t {
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uint32_t ext_version;
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int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
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int (*_esp_intr_free)(void **ret_handle);
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void *(* _malloc)(size_t size);
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void (*_free)(void *p);
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void (*_hal_uart_start_tx)(int);
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int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *);
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int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t);
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int (*_hal_uart_close)(int);
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void (*_hal_uart_blocking_tx)(int, uint8_t);
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int (*_hal_uart_init)(int, void *);
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int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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uint32_t (* _os_random)(void);
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int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
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int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey);
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void (* _esp_reset_rpa_moudle)(void);
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void (* _esp_bt_track_pll_cap)(void);
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uint32_t magic;
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};
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/* External functions or variables
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************************************************************************
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*/
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extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
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extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
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extern int ble_controller_init(esp_bt_controller_config_t *cfg);
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extern int ble_controller_deinit(void);
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extern int ble_controller_enable(uint8_t mode);
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extern int ble_controller_disable(void);
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extern int esp_register_ext_funcs (struct ext_funcs_t *);
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extern void esp_unregister_ext_funcs (void);
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extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
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extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
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extern void esp_unregister_npl_funcs (void);
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extern void npl_freertos_mempool_deinit(void);
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extern void bt_bb_v2_init_cmplx(uint8_t i);
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extern int os_msys_buf_alloc(void);
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extern uint32_t r_os_cputime_get32(void);
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extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
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extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
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extern void r_ble_rtc_wake_up_state_clr(void);
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extern int os_msys_init(void);
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extern void os_msys_buf_free(void);
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extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
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const uint8_t *peer_pub_key_y,
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const uint8_t *our_priv_key, uint8_t *out_dhkey);
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extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
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extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
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extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
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extern uint32_t _bt_bss_start;
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extern uint32_t _bt_bss_end;
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extern uint32_t _nimble_bss_start;
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extern uint32_t _nimble_bss_end;
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extern uint32_t _nimble_data_start;
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extern uint32_t _nimble_data_end;
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extern uint32_t _bt_data_start;
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extern uint32_t _bt_data_end;
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/* Local Function Declaration
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*********************************************************************
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*/
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static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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static void task_delete_wrapper(void *task_handle);
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#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static void hci_uart_start_tx_wrapper(int uart_no);
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static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
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hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg);
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static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
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uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl);
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static int hci_uart_close_wrapper(int uart_no);
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static void hci_uart_blocking_tx_wrapper(int port, uint8_t data);
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static int hci_uart_init_wrapper(int uart_no, void *cfg);
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#endif
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in);
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static int esp_intr_free_wrapper(void **ret_handle);
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static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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static uint32_t osi_random_wrapper(void);
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static void esp_reset_rpa_moudle(void);
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/* Local variable definition
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***************************************************************************
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*/
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/* Static variable declare */
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static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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/* This variable tells if BLE is running */
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static bool s_ble_active = false;
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#ifdef CONFIG_PM_ENABLE
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static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
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#define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
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#endif /* #ifdef CONFIG_PM_ENABLE */
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#define BLE_RTC_DELAY_US (1100)
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#endif
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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#define BLE_RTC_DELAY_US (0)
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static void ble_sleep_timer_callback(void *arg);
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static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
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#endif
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static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
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._magic = OSI_COEX_MAGIC_VALUE,
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._version = OSI_COEX_VERSION,
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._coex_wifi_sleep_set = NULL,
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._coex_core_ble_conn_dyn_prio_get = NULL,
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._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
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._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
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};
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struct ext_funcs_t ext_funcs_ro = {
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.ext_version = EXT_FUNC_VERSION,
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._esp_intr_alloc = esp_intr_alloc_wrapper,
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._esp_intr_free = esp_intr_free_wrapper,
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._malloc = bt_osi_mem_malloc_internal,
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._free = bt_osi_mem_free,
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#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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._hal_uart_start_tx = hci_uart_start_tx_wrapper,
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._hal_uart_init_cbs = hci_uart_init_cbs_wrapper,
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._hal_uart_config = hci_uart_config_wrapper,
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._hal_uart_close = hci_uart_close_wrapper,
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._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper,
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._hal_uart_init = hci_uart_init_wrapper,
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#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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._task_create = task_create_wrapper,
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._task_delete = task_delete_wrapper,
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._osi_assert = osi_assert_wrapper,
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._os_random = osi_random_wrapper,
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._ecc_gen_key_pair = ble_sm_alg_gen_key_pair,
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._ecc_gen_dh_key = ble_sm_alg_gen_dhkey,
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._esp_reset_rpa_moudle = esp_reset_rpa_moudle,
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.magic = EXT_FUNC_MAGIC_VALUE,
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};
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static void IRAM_ATTR esp_reset_rpa_moudle(void)
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{
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DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
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DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, BLE_RPA_REST_BIT);
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}
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static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
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{
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BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
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assert(0);
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}
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static uint32_t IRAM_ATTR osi_random_wrapper(void)
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{
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return esp_random();
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}
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static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
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{
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#if CONFIG_SW_COEXIST_ENABLE
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coex_schm_status_bit_set(type, status);
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#endif
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}
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
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{
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#if CONFIG_SW_COEXIST_ENABLE
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coex_schm_status_bit_clear(type, status);
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#endif
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}
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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bool esp_vhci_host_check_send_available(void)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return false;
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}
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return true;
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}
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/**
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* Allocates an mbuf for use by the nimble host.
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*/
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static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space)
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{
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struct os_mbuf *om;
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int rc;
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om = os_msys_get_pkthdr(0, 0);
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if (om == NULL) {
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return NULL;
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}
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if (om->om_omp->omp_databuf_len < leading_space) {
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rc = os_mbuf_free_chain(om);
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assert(rc == 0);
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return NULL;
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}
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om->om_data += leading_space;
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return om;
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}
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/**
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* Allocates an mbuf suitable for an HCI ACL data packet.
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*
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* @return An empty mbuf on success; null on memory
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* exhaustion.
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*/
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struct os_mbuf *ble_hs_mbuf_acl_pkt(void)
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{
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return ble_hs_mbuf_gen_pkt(4 + 1);
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}
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void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return;
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}
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if (*(data) == DATA_TYPE_COMMAND) {
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struct ble_hci_cmd *cmd = NULL;
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cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
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memcpy((uint8_t *)cmd, data + 1, len - 1);
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ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
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}
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if (*(data) == DATA_TYPE_ACL) {
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struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
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assert(om);
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os_mbuf_append(om, &data[1], len - 1);
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ble_hci_trans_hs_acl_tx(om);
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}
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}
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esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return ESP_FAIL;
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}
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ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL);
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return ESP_OK;
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}
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#endif
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
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{
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return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
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}
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static void task_delete_wrapper(void *task_handle)
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{
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vTaskDelete(task_handle);
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}
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#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static void hci_uart_start_tx_wrapper(int uart_no)
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{
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hci_uart_start_tx(uart_no);
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}
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static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func,
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hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg)
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{
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int rc = -1;
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rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
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return rc;
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}
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static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, uint8_t stop_bits,
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uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl)
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{
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int rc = -1;
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rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl);
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return rc;
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}
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static int hci_uart_close_wrapper(int uart_no)
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{
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int rc = -1;
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rc = hci_uart_close(uart_no);
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return rc;
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}
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static void hci_uart_blocking_tx_wrapper(int port, uint8_t data)
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{
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//This function is nowhere to use.
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}
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static int hci_uart_init_wrapper(int uart_no, void *cfg)
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{
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//This function is nowhere to use.
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return 0;
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}
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#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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static int ble_hci_unregistered_hook(void*, void*)
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{
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ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__);
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return 0;
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}
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
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{
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int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in);
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return rc;
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}
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static int esp_intr_free_wrapper(void **ret_handle)
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{
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int rc = 0;
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rc = esp_intr_free((intr_handle_t) * ret_handle);
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*ret_handle = NULL;
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return rc;
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}
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IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
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{
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if (!s_ble_active) {
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return;
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}
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#ifdef CONFIG_PM_ENABLE
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#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
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uint32_t delta_tick;
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uint32_t us_to_sleep;
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uint32_t sleep_tick;
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uint32_t tick_invalid = *(uint32_t*)(arg);
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assert(arg != NULL);
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if (!tick_invalid) {
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sleep_tick = r_os_cputime_get32();
|
|
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
|
|
delta_tick = enable_tick - sleep_tick;
|
|
if (delta_tick & 0x80000000) {
|
|
return;
|
|
}
|
|
us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
|
|
if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
|
|
return;
|
|
}
|
|
esp_err_t err = esp_timer_start_once(s_ble_sleep_timer, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
|
|
if (err != ESP_OK) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed\n");
|
|
return;
|
|
}
|
|
}
|
|
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
r_ble_rtc_wake_up_state_clr();
|
|
#endif
|
|
esp_pm_lock_release(s_pm_lock);
|
|
#endif // CONFIG_PM_ENABLE
|
|
esp_phy_disable();
|
|
s_ble_active = false;
|
|
}
|
|
|
|
IRAM_ATTR void controller_wakeup_cb(void *arg)
|
|
{
|
|
if (s_ble_active) {
|
|
return;
|
|
}
|
|
esp_phy_enable();
|
|
// need to check if need to call pm lock here
|
|
#ifdef CONFIG_PM_ENABLE
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
#endif //CONFIG_PM_ENABLE
|
|
s_ble_active = true;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
static void ble_sleep_timer_callback(void * arg)
|
|
{
|
|
|
|
}
|
|
|
|
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
esp_err_t controller_sleep_init(void)
|
|
{
|
|
esp_err_t rc = 0;
|
|
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled\n");
|
|
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
#endif // CONFIG_BT_LE_SLEEP_ENABLE
|
|
|
|
// enable light sleep
|
|
#ifdef CONFIG_PM_ENABLE
|
|
rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
|
|
if (rc != ESP_OK) {
|
|
goto error;
|
|
}
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
esp_timer_create_args_t create_args = {
|
|
.callback = ble_sleep_timer_callback,
|
|
.arg = NULL,
|
|
.name = "btSlp"
|
|
};
|
|
rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
|
|
if (rc != ESP_OK) {
|
|
goto error;
|
|
}
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
|
|
#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
esp_sleep_enable_bt_wakeup();
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
|
|
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
|
|
return rc;
|
|
|
|
error:
|
|
/*lock should release first and then delete*/
|
|
if (s_pm_lock != NULL) {
|
|
esp_pm_lock_release(s_pm_lock);
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
s_pm_lock = NULL;
|
|
}
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
if (s_ble_sleep_timer != NULL) {
|
|
esp_timer_stop(s_ble_sleep_timer);
|
|
esp_timer_delete(s_ble_sleep_timer);
|
|
s_ble_sleep_timer = NULL;
|
|
}
|
|
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
esp_sleep_disable_bt_wakeup();
|
|
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
|
|
#endif //CONFIG_PM_ENABLE
|
|
return rc;
|
|
}
|
|
|
|
void controller_sleep_deinit(void)
|
|
{
|
|
#ifdef CONFIG_PM_ENABLE
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
r_ble_rtc_wake_up_state_clr();
|
|
esp_sleep_disable_bt_wakeup();
|
|
#endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
|
|
|
|
/*lock should release first and then delete*/
|
|
if (s_ble_active) {
|
|
esp_pm_lock_release(s_pm_lock);
|
|
}
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
s_pm_lock = NULL;
|
|
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
if (s_ble_sleep_timer != NULL) {
|
|
esp_timer_stop(s_ble_sleep_timer);
|
|
esp_timer_delete(s_ble_sleep_timer);
|
|
s_ble_sleep_timer = NULL;
|
|
}
|
|
#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
#endif //CONFIG_PM_ENABLE
|
|
}
|
|
|
|
void ble_rtc_clk_init(void)
|
|
{
|
|
// modem_clkrst_reg
|
|
// LP_TIMER_SEL_XTAL32K -> 0
|
|
// LP_TIMER_SEL_XTAL -> 1
|
|
// LP_TIMER_SEL_8M -> 0
|
|
// LP_TIMER_SEL_RTC_SLOW -> 0
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_XTAL32K_S);
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 1, MODEM_CLKRST_LP_TIMER_SEL_XTAL_S);
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S);
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S);
|
|
|
|
#ifdef CONFIG_XTAL_FREQ_26
|
|
// LP_TIMER_CLK_DIV_NUM -> 130
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
|
|
#else
|
|
// LP_TIMER_CLK_DIV_NUM -> 250
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S);
|
|
#endif // CONFIG_XTAL_FREQ_26
|
|
|
|
// MODEM_CLKRST_ETM_CLK_ACTIVE -> 1
|
|
// MODEM_CLKRST_ETM_CLK_SEL -> 0
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 1, MODEM_CLKRST_ETM_CLK_ACTIVE_S);
|
|
SET_PERI_REG_BITS(MODEM_CLKRST_ETM_CLK_CONF_REG, 1, 0, MODEM_CLKRST_ETM_CLK_SEL_S);
|
|
|
|
}
|
|
|
|
|
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
|
{
|
|
esp_err_t ret = ESP_OK;
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
return ESP_FAIL;
|
|
}
|
|
if (cfg == NULL) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
|
|
ble_rtc_clk_init();
|
|
|
|
if (esp_register_ext_funcs(&ext_funcs_ro) != 0) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
|
|
/* Initialize the function pointers for OS porting */
|
|
npl_freertos_funcs_init();
|
|
struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
|
|
if (!p_npl_funcs) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
|
|
if (esp_register_npl_funcs(p_npl_funcs) != 0) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
goto free_mem;
|
|
}
|
|
|
|
if (npl_freertos_mempool_init() != 0) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
goto free_mem;
|
|
}
|
|
|
|
/* Initialize the global memory pool */
|
|
if (os_msys_buf_alloc() != 0) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
goto free_mem;
|
|
}
|
|
|
|
os_msys_init();
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
|
// ble_npl_eventq_init() need to use npl function in rom and must be called after esp_bt_controller_init()
|
|
/* Initialize default event queue */
|
|
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
|
|
#endif
|
|
esp_phy_pd_mem_init();
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
|
|
|
// init phy
|
|
esp_phy_enable();
|
|
s_ble_active = true;
|
|
|
|
// init bb
|
|
bt_bb_v2_init_cmplx(1);
|
|
|
|
if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
goto free_controller;
|
|
}
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
coex_init();
|
|
#endif
|
|
ret = ble_controller_init(cfg);
|
|
if (ret != ESP_OK) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
|
|
goto free_controller;
|
|
}
|
|
|
|
ret = controller_sleep_init();
|
|
if (ret != ESP_OK) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
|
|
goto free_controller;
|
|
}
|
|
|
|
uint8_t mac[6];
|
|
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
|
|
|
|
swap_in_place(mac, 6);
|
|
|
|
esp_ble_ll_set_public_addr(mac);
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
|
|
|
ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
|
|
(ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
|
|
return ESP_OK;
|
|
free_controller:
|
|
controller_sleep_deinit();
|
|
ble_controller_deinit();
|
|
esp_phy_disable();
|
|
esp_phy_pd_mem_deinit();
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
|
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
|
|
#endif // CONFIG_BT_NIMBLE_ENABLED
|
|
free_mem:
|
|
os_msys_buf_free();
|
|
npl_freertos_mempool_deinit();
|
|
esp_unregister_npl_funcs();
|
|
npl_freertos_funcs_deinit();
|
|
esp_unregister_ext_funcs();
|
|
return ret;
|
|
}
|
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
|
{
|
|
if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) || (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
return ESP_FAIL;
|
|
}
|
|
|
|
controller_sleep_deinit();
|
|
|
|
if (s_ble_active) {
|
|
esp_phy_disable();
|
|
s_ble_active = false;
|
|
}
|
|
|
|
ble_controller_deinit();
|
|
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
|
/* De-initialize default event queue */
|
|
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
|
|
#endif
|
|
os_msys_buf_free();
|
|
|
|
esp_unregister_npl_funcs();
|
|
|
|
esp_unregister_ext_funcs();
|
|
|
|
/* De-initialize npl functions */
|
|
npl_freertos_funcs_deinit();
|
|
|
|
npl_freertos_mempool_deinit();
|
|
|
|
esp_phy_pd_mem_deinit();
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
|
|
|
return ESP_OK;
|
|
}
|
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
{
|
|
if (mode != ESP_BT_MODE_BLE) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
|
|
return ESP_FAIL;
|
|
}
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
return ESP_FAIL;
|
|
}
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
coex_enable();
|
|
#endif
|
|
if (ble_controller_enable(mode) != 0) {
|
|
return ESP_FAIL;
|
|
}
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
|
return ESP_OK;
|
|
}
|
|
|
|
esp_err_t esp_bt_controller_disable(void)
|
|
{
|
|
if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
return ESP_FAIL;
|
|
}
|
|
if (ble_controller_disable() != 0) {
|
|
return ESP_FAIL;
|
|
}
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
|
return ESP_OK;
|
|
}
|
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
{
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
|
|
return ESP_OK;
|
|
}
|
|
|
|
static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
|
|
{
|
|
int ret = heap_caps_add_region(start, end);
|
|
/* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
|
|
* is too small to fit a heap. This cannot be termed as a fatal error and hence
|
|
* we replace it by ESP_OK
|
|
*/
|
|
if (ret == ESP_ERR_INVALID_SIZE) {
|
|
return ESP_OK;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
|
|
{
|
|
intptr_t mem_start, mem_end;
|
|
|
|
if (mode == ESP_BT_MODE_BLE) {
|
|
mem_start = (intptr_t)&_bt_bss_start;
|
|
mem_end = (intptr_t)&_bt_bss_end;
|
|
if (mem_start != mem_end) {
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
}
|
|
|
|
mem_start = (intptr_t)&_bt_data_start;
|
|
mem_end = (intptr_t)&_bt_data_end;
|
|
if (mem_start != mem_end) {
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
}
|
|
|
|
mem_start = (intptr_t)&_nimble_bss_start;
|
|
mem_end = (intptr_t)&_nimble_bss_end;
|
|
if (mem_start != mem_end) {
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
}
|
|
|
|
mem_start = (intptr_t)&_nimble_data_start;
|
|
mem_end = (intptr_t)&_nimble_data_end;
|
|
if (mem_start != mem_end) {
|
|
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
}
|
|
}
|
|
|
|
return ESP_OK;
|
|
}
|
|
|
|
|
|
esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
{
|
|
return ble_controller_status;
|
|
}
|
|
|
|
/* extra functions */
|
|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
{
|
|
esp_err_t stat = ESP_FAIL;
|
|
|
|
switch (power_type) {
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
|
|
stat = ESP_OK;
|
|
}
|
|
break;
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
|
|
stat = ESP_OK;
|
|
}
|
|
break;
|
|
default:
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
break;
|
|
}
|
|
|
|
return stat;
|
|
}
|
|
|
|
esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle, esp_power_level_t power_level)
|
|
{
|
|
esp_err_t stat = ESP_FAIL;
|
|
switch (power_type) {
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
|
|
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
|
|
stat = ESP_OK;
|
|
}
|
|
break;
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
|
|
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
|
|
stat = ESP_OK;
|
|
}
|
|
break;
|
|
default:
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
break;
|
|
}
|
|
|
|
return stat;
|
|
}
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
{
|
|
int tx_level = 0;
|
|
|
|
switch (power_type) {
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
|
|
break;
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
|
|
break;
|
|
default:
|
|
return ESP_PWR_LVL_INVALID;
|
|
}
|
|
|
|
if (tx_level < 0) {
|
|
return ESP_PWR_LVL_INVALID;
|
|
}
|
|
|
|
return (esp_power_level_t)tx_level;
|
|
}
|
|
|
|
esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle)
|
|
{
|
|
int tx_level = 0;
|
|
|
|
switch (power_type) {
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
|
|
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
|
|
break;
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
|
|
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
|
|
tx_level = ble_txpwr_get(power_type, handle);
|
|
break;
|
|
default:
|
|
return ESP_PWR_LVL_INVALID;
|
|
}
|
|
|
|
if (tx_level < 0) {
|
|
return ESP_PWR_LVL_INVALID;
|
|
}
|
|
|
|
return (esp_power_level_t)tx_level;
|
|
}
|
|
|
|
|
|
#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
|
|
|
|
#define BLE_SM_KEY_ERR 0x17
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
#include "mbedtls/aes.h"
|
|
|
|
#if CONFIG_BT_LE_SM_SC
|
|
#include "mbedtls/cipher.h"
|
|
#include "mbedtls/entropy.h"
|
|
#include "mbedtls/ctr_drbg.h"
|
|
#include "mbedtls/cmac.h"
|
|
#include "mbedtls/ecdh.h"
|
|
#include "mbedtls/ecp.h"
|
|
#endif
|
|
|
|
#else
|
|
#include "tinycrypt/aes.h"
|
|
#include "tinycrypt/constants.h"
|
|
#include "tinycrypt/utils.h"
|
|
|
|
#if CONFIG_BT_LE_SM_SC
|
|
#include "tinycrypt/cmac_mode.h"
|
|
#include "tinycrypt/ecc_dh.h"
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
#if CONFIG_BT_LE_SM_SC
|
|
static mbedtls_ecp_keypair keypair;
|
|
#endif
|
|
#endif
|
|
|
|
int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x, const uint8_t *peer_pub_key_y,
|
|
const uint8_t *our_priv_key, uint8_t *out_dhkey)
|
|
{
|
|
uint8_t dh[32];
|
|
uint8_t pk[64];
|
|
uint8_t priv[32];
|
|
int rc = BLE_SM_KEY_ERR;
|
|
|
|
swap_buf(pk, peer_pub_key_x, 32);
|
|
swap_buf(&pk[32], peer_pub_key_y, 32);
|
|
swap_buf(priv, our_priv_key, 32);
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
struct mbedtls_ecp_point pt = {0}, Q = {0};
|
|
mbedtls_mpi z = {0}, d = {0};
|
|
mbedtls_ctr_drbg_context ctr_drbg = {0};
|
|
mbedtls_entropy_context entropy = {0};
|
|
|
|
uint8_t pub[65] = {0};
|
|
/* Hardcoded first byte of pub key for MBEDTLS_ECP_PF_UNCOMPRESSED */
|
|
pub[0] = 0x04;
|
|
memcpy(&pub[1], pk, 64);
|
|
|
|
/* Initialize the required structures here */
|
|
mbedtls_ecp_point_init(&pt);
|
|
mbedtls_ecp_point_init(&Q);
|
|
mbedtls_ctr_drbg_init(&ctr_drbg);
|
|
mbedtls_entropy_init(&entropy);
|
|
mbedtls_mpi_init(&d);
|
|
mbedtls_mpi_init(&z);
|
|
|
|
/* Below 3 steps are to validate public key on curve secp256r1 */
|
|
if (mbedtls_ecp_group_load(&keypair.MBEDTLS_PRIVATE(grp), MBEDTLS_ECP_DP_SECP256R1) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &pt, pub, 65) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
if (mbedtls_ecp_check_pubkey(&keypair.MBEDTLS_PRIVATE(grp), &pt) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
/* Set PRNG */
|
|
if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
|
|
NULL, 0)) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
/* Prepare point Q from pub key */
|
|
if (mbedtls_ecp_point_read_binary(&keypair.MBEDTLS_PRIVATE(grp), &Q, pub, 65) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
if (mbedtls_mpi_read_binary(&d, priv, 32) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
rc = mbedtls_ecdh_compute_shared(&keypair.MBEDTLS_PRIVATE(grp), &z, &Q, &d,
|
|
mbedtls_ctr_drbg_random, &ctr_drbg);
|
|
if (rc != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
rc = mbedtls_mpi_write_binary(&z, dh, 32);
|
|
if (rc != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
mbedtls_ecp_point_free(&pt);
|
|
mbedtls_mpi_free(&z);
|
|
mbedtls_mpi_free(&d);
|
|
mbedtls_ecp_point_free(&Q);
|
|
mbedtls_entropy_free(&entropy);
|
|
mbedtls_ctr_drbg_free(&ctr_drbg);
|
|
if (rc != 0) {
|
|
return BLE_SM_KEY_ERR;
|
|
}
|
|
|
|
#else
|
|
if (uECC_valid_public_key(pk, &curve_secp256r1) < 0) {
|
|
return BLE_SM_KEY_ERR;
|
|
}
|
|
|
|
rc = uECC_shared_secret(pk, priv, dh, &curve_secp256r1);
|
|
if (rc == TC_CRYPTO_FAIL) {
|
|
return BLE_SM_KEY_ERR;
|
|
}
|
|
#endif
|
|
|
|
swap_buf(out_dhkey, dh, 32);
|
|
return 0;
|
|
}
|
|
|
|
/* based on Core Specification 4.2 Vol 3. Part H 2.3.5.6.1 */
|
|
static const uint8_t ble_sm_alg_dbg_priv_key[32] = {
|
|
0x3f, 0x49, 0xf6, 0xd4, 0xa3, 0xc5, 0x5f, 0x38, 0x74, 0xc9, 0xb3, 0xe3,
|
|
0xd2, 0x10, 0x3f, 0x50, 0x4a, 0xff, 0x60, 0x7b, 0xeb, 0x40, 0xb7, 0x99,
|
|
0x58, 0x99, 0xb8, 0xa6, 0xcd, 0x3c, 0x1a, 0xbd
|
|
};
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
static int mbedtls_gen_keypair(uint8_t *public_key, uint8_t *private_key)
|
|
{
|
|
int rc = BLE_SM_KEY_ERR;
|
|
mbedtls_entropy_context entropy = {0};
|
|
mbedtls_ctr_drbg_context ctr_drbg = {0};
|
|
|
|
mbedtls_entropy_init(&entropy);
|
|
mbedtls_ctr_drbg_init(&ctr_drbg);
|
|
mbedtls_ecp_keypair_init(&keypair);
|
|
|
|
if ((rc = mbedtls_ctr_drbg_seed(&ctr_drbg, mbedtls_entropy_func, &entropy,
|
|
NULL, 0)) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
if ((rc = mbedtls_ecp_gen_key(MBEDTLS_ECP_DP_SECP256R1, &keypair,
|
|
mbedtls_ctr_drbg_random, &ctr_drbg)) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
if ((rc = mbedtls_mpi_write_binary(&keypair.MBEDTLS_PRIVATE(d), private_key, 32)) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
size_t olen = 0;
|
|
uint8_t pub[65] = {0};
|
|
|
|
if ((rc = mbedtls_ecp_point_write_binary(&keypair.MBEDTLS_PRIVATE(grp), &keypair.MBEDTLS_PRIVATE(Q), MBEDTLS_ECP_PF_UNCOMPRESSED,
|
|
&olen, pub, 65)) != 0) {
|
|
goto exit;
|
|
}
|
|
|
|
memcpy(public_key, &pub[1], 64);
|
|
|
|
exit:
|
|
mbedtls_ctr_drbg_free(&ctr_drbg);
|
|
mbedtls_entropy_free(&entropy);
|
|
if (rc != 0) {
|
|
mbedtls_ecp_keypair_free(&keypair);
|
|
return BLE_SM_KEY_ERR;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* pub: 64 bytes
|
|
* priv: 32 bytes
|
|
*/
|
|
int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
|
|
{
|
|
#if CONFIG_BT_LE_SM_SC_DEBUG_KEYS
|
|
swap_buf(pub, ble_sm_alg_dbg_pub_key, 32);
|
|
swap_buf(&pub[32], &ble_sm_alg_dbg_pub_key[32], 32);
|
|
swap_buf(priv, ble_sm_alg_dbg_priv_key, 32);
|
|
#else
|
|
uint8_t pk[64];
|
|
|
|
do {
|
|
|
|
#if CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS
|
|
if (mbedtls_gen_keypair(pk, priv) != 0) {
|
|
return BLE_SM_KEY_ERR;
|
|
}
|
|
#else
|
|
if (uECC_make_key(pk, priv, &curve_secp256r1) != TC_CRYPTO_SUCCESS) {
|
|
return BLE_SM_KEY_ERR;
|
|
}
|
|
#endif
|
|
|
|
/* Make sure generated key isn't debug key. */
|
|
} while (memcmp(priv, ble_sm_alg_dbg_priv_key, 32) == 0);
|
|
|
|
swap_buf(pub, pk, 32);
|
|
swap_buf(&pub[32], &pk[32], 32);
|
|
swap_in_place(priv, 32);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
#endif
|