Omar Chebib 5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer ... G0 doesn't depend on any G1+ layer for RISC-V based targets		2022-06-14 15:00:53 +08:00
..
include/soc	G0: RISC-V targets have now an independent G0 layer	2022-06-14 15:00:53 +08:00
ld	soc: Adds efuse hal	2022-02-24 22:20:09 +08:00
adc_periph.c	adc: create common adc hal layer	2022-05-07 19:20:44 +08:00
CMakeLists.txt	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
dedic_gpio_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
gdma_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
gpio_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
i2c_bbpll.h	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
i2c_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
interrupts.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
ledc_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
spi_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
timer_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00
uart_periph.c	esp8684: rename target to esp32c2	2022-01-19 11:08:57 +08:00