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319 lines
15 KiB
C
319 lines
15 KiB
C
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in hal/include/hal/readme.md
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******************************************************************************/
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/*
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* The HAL layer for SPI Slave HD mode.
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*
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* Usage (segment mode):
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* - Firstly, initialize the slave with `spi_slave_hd_hal_init`
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*
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* - Event handling:
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* - (Optional) Call ``spi_slave_hd_hal_enable_event_intr`` to enable the used interrupts
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* - (Basic) Call ``spi_slave_hd_hal_check_clear_event`` to check whether an event happen, and also
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* clear its interrupt. For events: SPI_EV_BUF_TX, SPI_EV_BUF_RX, SPI_EV_BUF_RX, SPI_EV_CMD9,
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* SPI_EV_CMDA.
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* - (Advanced) Call ``spi_slave_hd_hal_check_disable_event`` to disable the interrupt of an event,
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* so that the task can call ``spi_slave_hd_hal_invoke_event_intr`` later to manually invoke the
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* ISR. For SPI_EV_SEND, SPI_EV_RECV.
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*
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* - TXDMA:
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* - To send data through DMA, call `spi_slave_hd_hal_txdma`
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* - When the operation is done, SPI_EV_SEND will be triggered.
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*
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* - RXDMA:
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* - To receive data through DMA, call `spi_slave_hd_hal_rxdma`
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* - When the operation is done, SPI_EV_RECV will be triggered.
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* - Call ``spi_slave_hd_hal_rxdma_seg_get_len`` to get the received length
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*
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* - Shared buffer:
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* - Call ``spi_slave_hd_hal_write_buffer`` to write the shared register buffer. When the buffer is
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* read by the master (regardless of the read address), SPI_EV_BUF_TX will be triggered
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* - Call ``spi_slave_hd_hal_read_buffer`` to read the shared register buffer. When the buffer is
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* written by the master (regardless of the written address), SPI_EV_BUF_RX will be triggered.
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*/
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#pragma once
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#include <esp_types.h>
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#include "esp_err.h"
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#include "hal/spi_ll.h"
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#include "hal/spi_types.h"
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/**
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* @brief Type of dma descriptor with appended members
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* this structure inherits DMA descriptor, with a pointer to the transaction descriptor passed from users.
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*/
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typedef struct {
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lldesc_t desc; ///< DMA descriptor
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void *arg; ///< This points to the transaction descriptor user passed in
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} spi_slave_hd_hal_desc_append_t;
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/// Configuration of the HAL
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typedef struct {
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uint32_t host_id; ///< Host ID of the spi peripheral
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spi_dma_dev_t *dma_in; ///< Input DMA(DMA -> RAM) peripheral register address
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spi_dma_dev_t *dma_out; ///< Output DMA(RAM -> DMA) peripheral register address
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bool dma_enabled; ///< DMA enabled or not
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uint32_t tx_dma_chan; ///< TX DMA channel used.
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uint32_t rx_dma_chan; ///< RX DMA channel used.
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bool append_mode; ///< True for DMA append mode, false for segment mode
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uint32_t spics_io_num; ///< CS GPIO pin for this device
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uint8_t mode; ///< SPI mode (0-3)
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uint32_t command_bits; ///< command field bits, multiples of 8 and at least 8.
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uint32_t address_bits; ///< address field bits, multiples of 8 and at least 8.
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uint32_t dummy_bits; ///< dummy field bits, multiples of 8 and at least 8.
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struct {
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uint32_t tx_lsbfirst : 1; ///< Whether TX data should be sent with LSB first.
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uint32_t rx_lsbfirst : 1; ///< Whether RX data should be read with LSB first.
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};
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} spi_slave_hd_hal_config_t;
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/// Context of the HAL, initialized by :cpp:func:`spi_slave_hd_hal_init`.
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typedef struct {
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/* These two need to be malloced by the driver first */
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spi_slave_hd_hal_desc_append_t *dmadesc_tx; ///< Head of the TX DMA descriptors.
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spi_slave_hd_hal_desc_append_t *dmadesc_rx; ///< Head of the RX DMA descriptors.
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/* address of the hardware */
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spi_dev_t *dev; ///< Beginning address of the peripheral registers.
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spi_dma_dev_t *dma_in; ///< Address of the DMA peripheral registers which stores the data received from a peripheral into RAM.
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spi_dma_dev_t *dma_out; ///< Address of the DMA peripheral registers which transmits the data from RAM to a peripheral.
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bool dma_enabled; ///< DMA enabled or not
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uint32_t tx_dma_chan; ///< TX DMA channel used.
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uint32_t rx_dma_chan; ///< RX DMA channel used.
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bool append_mode; ///< True for DMA append mode, false for segment mode
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uint32_t dma_desc_num; ///< Number of the available DMA descriptors. Calculated from ``bus_max_transfer_size``.
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spi_slave_hd_hal_desc_append_t *tx_cur_desc; ///< Current TX DMA descriptor that could be linked (set up).
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spi_slave_hd_hal_desc_append_t *tx_dma_head; ///< Head of the linked TX DMA descriptors which are not used by hardware
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spi_slave_hd_hal_desc_append_t *tx_dma_tail; ///< Tail of the linked TX DMA descriptors which are not used by hardware
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spi_slave_hd_hal_desc_append_t tx_dummy_head; ///< Dummy descriptor for ``tx_dma_head`` to start
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uint32_t tx_used_desc_cnt; ///< Number of the TX descriptors that have been setup
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uint32_t tx_recycled_desc_cnt; ///< Number of the TX descriptors that could be recycled
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spi_slave_hd_hal_desc_append_t *rx_cur_desc; ///< Current RX DMA descriptor that could be linked (set up).
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spi_slave_hd_hal_desc_append_t *rx_dma_head; ///< Head of the linked RX DMA descriptors which are not used by hardware
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spi_slave_hd_hal_desc_append_t *rx_dma_tail; ///< Tail of the linked RX DMA descriptors which are not used by hardware
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spi_slave_hd_hal_desc_append_t rx_dummy_head; ///< Dummy descriptor for ``rx_dma_head`` to start
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uint32_t rx_used_desc_cnt; ///< Number of the RX descriptors that have been setup
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uint32_t rx_recycled_desc_cnt; ///< Number of the RX descriptors that could be recycled
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/* Internal status used by the HAL implementation, initialized as 0. */
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uint32_t intr_not_triggered;
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bool tx_dma_started;
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bool rx_dma_started;
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} spi_slave_hd_hal_context_t;
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/**
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* @brief Initialize the hardware and part of the context
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*
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* @param hal Context of the HAL layer
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* @param hal_config Configuration of the HAL
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*/
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void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_hal_config_t *hal_config);
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/**
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* @brief Get the size of one DMA descriptor
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*
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* @param hal Context of the HAL layer
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* @param bus_size SPI bus maximum transfer size, in bytes.
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* @return Total size needed for all the DMA descriptors
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*/
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uint32_t spi_slave_hd_hal_get_total_desc_size(spi_slave_hd_hal_context_t *hal, uint32_t bus_size);
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/**
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* @brief Get the actual bus size
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*
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* @param hal Context of the HAL layer
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* @return Actual bus transaction size
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*/
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uint32_t spi_salve_hd_hal_get_max_bus_size(spi_slave_hd_hal_context_t *hal);
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/**
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* @brief Check and clear signal of one event
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*
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* @param hal Context of the HAL layer
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* @param ev Event to check
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* @return True if event triggered, otherwise false
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*/
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bool spi_slave_hd_hal_check_clear_event(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
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/**
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* @brief Check and clear the interrupt of one event.
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*
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* @note The event source will be kept, so that the interrupt can be invoked by
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* :cpp:func:`spi_slave_hd_hal_invoke_event_intr`. If event not triggered, its interrupt source
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* will not be disabled either.
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*
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* @param hal Context of the HAL layer
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* @param ev Event to check and disable
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* @return True if event triggered, otherwise false
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*/
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bool spi_slave_hd_hal_check_disable_event(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
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/**
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* @brief Enable to invole the ISR of corresponding event.
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*
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* @note The function, compared with :cpp:func:`spi_slave_hd_hal_enable_event_intr`, contains a
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* workaround to force trigger the interrupt, even if the interrupt source cannot be initialized
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* correctly.
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*
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* @param hal Context of the HAL layer
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* @param ev Event (reason) to invoke the ISR
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*/
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void spi_slave_hd_hal_invoke_event_intr(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
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/**
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* @brief Enable the interrupt source of corresponding event.
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*
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* @param hal Context of the HAL layer
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* @param ev Event whose corresponding interrupt source should be enabled.
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*/
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void spi_slave_hd_hal_enable_event_intr(spi_slave_hd_hal_context_t* hal, spi_event_t ev);
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////////////////////////////////////////////////////////////////////////////////
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// RX DMA
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////////////////////////////////////////////////////////////////////////////////
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/**
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* @brief Start the RX DMA operation to the specified buffer.
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*
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* @param hal Context of the HAL layer
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* @param[out] out_buf Buffer to receive the data
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* @param len Maximul length to receive
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*/
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void spi_slave_hd_hal_rxdma(spi_slave_hd_hal_context_t *hal, uint8_t *out_buf, size_t len);
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/**
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* @brief Get the length of total received data
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*
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* @param hal Context of the HAL layer
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* @return The received length
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*/
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int spi_slave_hd_hal_rxdma_seg_get_len(spi_slave_hd_hal_context_t *hal);
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////////////////////////////////////////////////////////////////////////////////
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// TX DMA
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////////////////////////////////////////////////////////////////////////////////
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/**
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* @brief Start the TX DMA operation with the specified buffer
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*
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* @param hal Context of the HAL layer
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* @param data Buffer of data to send
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* @param len Size of the buffer, also the maximum length to send
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*/
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void spi_slave_hd_hal_txdma(spi_slave_hd_hal_context_t *hal, uint8_t *data, size_t len);
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////////////////////////////////////////////////////////////////////////////////
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// Shared buffer
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////////////////////////////////////////////////////////////////////////////////
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/**
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* @brief Read from the shared register buffer
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*
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* @param hal Context of the HAL layer
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* @param addr Address of the shared regsiter to read
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* @param out_data Buffer to store the read data
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* @param len Length to read from the shared buffer
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*/
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void spi_slave_hd_hal_read_buffer(spi_slave_hd_hal_context_t *hal, int addr, uint8_t *out_data, size_t len);
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/**
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* @brief Write the shared register buffer
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*
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* @param hal Context of the HAL layer
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* @param addr Address of the shared register to write
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* @param data Buffer of the data to write
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* @param len Length to write into the shared buffer
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*/
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void spi_slave_hd_hal_write_buffer(spi_slave_hd_hal_context_t *hal, int addr, uint8_t *data, size_t len);
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/**
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* @brief Get the length of previous transaction.
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*
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* @param hal Context of the HAL layer
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* @return The length of previous transaction
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*/
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int spi_slave_hd_hal_get_rxlen(spi_slave_hd_hal_context_t *hal);
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/**
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* @brief Get the address of last transaction
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*
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* @param hal Context of the HAL layer
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* @return The address of last transaction
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*/
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int spi_slave_hd_hal_get_last_addr(spi_slave_hd_hal_context_t *hal);
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#if CONFIG_IDF_TARGET_ESP32S2
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//Append mode is only supported on ESP32S2 now
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////////////////////////////////////////////////////////////////////////////////
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// Append Mode
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////////////////////////////////////////////////////////////////////////////////
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/**
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* @brief Return the finished TX transaction
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*
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* @note This API is based on this assumption: the hardware behaviour of current transaction completion is only modified by the its own caller layer.
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* This means if some other code changed the hardware behaviour (e.g. clear intr raw bit), or the caller call this API without noticing the HW behaviour,
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* this API will go wrong.
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*
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* @param hal Context of the HAL layer
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* @param out_trans Pointer to the caller-defined transaction
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* @return 1: Transaction is finished; 0: Transaction is not finished
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*/
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bool spi_slave_hd_hal_get_tx_finished_trans(spi_slave_hd_hal_context_t *hal, void **out_trans);
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/**
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* @brief Return the finished RX transaction
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*
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* @note This API is based on this assumption: the hardware behaviour of current transaction completion is only modified by the its own caller layer.
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* This means if some other code changed the hardware behaviour (e.g. clear intr raw bit), or the caller call this API without noticing the HW behaviour,
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* this API will go wrong.
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*
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* @param hal Context of the HAL layer
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* @param out_trans Pointer to the caller-defined transaction
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* @param out_len Actual number of bytes of received data
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* @return 1: Transaction is finished; 0: Transaction is not finished
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*/
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bool spi_slave_hd_hal_get_rx_finished_trans(spi_slave_hd_hal_context_t *hal, void **out_trans, size_t *out_len);
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/**
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* @brief Load the TX DMA descriptors without stopping the DMA
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*
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* @param hal Context of the HAL layer
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* @param data Buffer of the transaction data
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* @param len Length of the data
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* @param arg Pointer used by the caller to indicate the tranaction. Will be returned by ``spi_slave_hd_hal_get_tx_finished_trans`` when transaction is finished
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* @return
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* - ESP_OK: on success
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* - ESP_ERR_INVALID_STATE: Function called in invalid state.
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*/
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esp_err_t spi_slave_hd_hal_txdma_append(spi_slave_hd_hal_context_t *hal, uint8_t *data, size_t len, void *arg);
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/**
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* @brief Load the RX DMA descriptors without stopping the DMA
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*
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* @param hal Context of the HAL layer
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* @param data Buffer of the transaction data
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* @param len Length of the data
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* @param arg Pointer used by the caller to indicate the tranaction. Will be returned by ``spi_slave_hd_hal_get_rx_finished_trans`` when transaction is finished
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* @return
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* - ESP_OK: on success
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* - ESP_ERR_INVALID_STATE: Function called in invalid state.
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*/
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esp_err_t spi_slave_hd_hal_rxdma_append(spi_slave_hd_hal_context_t *hal, uint8_t *data, size_t len, void *arg);
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#endif //#if CONFIG_IDF_TARGET_ESP32S2
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