mirror of
https://github.com/espressif/esp-idf.git
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112 lines
2.6 KiB
C
112 lines
2.6 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_phy_init.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ESP_CAL_DATA_CHECK_FAIL 1
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/**
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* @file phy.h
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* @brief Declarations for functions provided by libphy.a
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*/
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/**
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* @brief Return ROM function pointer table from PHY library.
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*/
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void phy_get_romfunc_addr(void);
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/**
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* @brief Initialize PHY module and do RF calibration
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* @param[in] init_data Initialization parameters to be used by the PHY
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* @param[inout] cal_data As input, calibration data previously obtained. As output, will contain new calibration data.
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* @param[in] cal_mode RF calibration mode
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* @return ESP_CAL_DATA_CHECK_FAIL if calibration data checksum fails, other values are reserved for future use
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*/
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int register_chipv7_phy(const esp_phy_init_data_t* init_data, esp_phy_calibration_data_t *cal_data, esp_phy_calibration_mode_t cal_mode);
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/**
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* @brief Get the format version of calibration data used by PHY library.
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* @return Format version number, OR'ed with BIT(16) if PHY is in WIFI only mode.
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*/
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uint32_t phy_get_rf_cal_version(void);
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/**
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* @brief Set RF/BB for only WIFI mode or coexist(WIFI & BT) mode
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* @param[in] true is for only WIFI mode, false is for coexist mode. default is 0.
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* @return NULL
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*/
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void phy_set_wifi_mode_only(bool wifi_only);
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/**
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* @brief Set BT the highest priority in coexist mode.
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* @return NULL
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*/
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void coex_bt_high_prio(void);
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/**
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* @brief Open PHY and RF.
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*/
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void phy_wakeup_init(void);
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/**
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* @brief Shutdown PHY and RF.
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*/
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void phy_close_rf(void);
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#if !CONFIG_IDF_TARGET_ESP32
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/**
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* @brief Disable PHY temperature sensor.
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*/
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void phy_xpd_tsens(void);
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#endif
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#if CONFIG_IDF_TARGET_ESP32C3
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/**
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* @brief Update internal state of PHY when wifi deinit powers off the wifi power domain.
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*/
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void phy_init_flag(void);
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#endif
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/**
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* @brief Store and load PHY digital registers.
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*
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* @param backup_en if backup_en is true, store PHY digital registers to memory. Otherwise load PHY digital registers from memory
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* @param mem_addr Memory address to store and load PHY digital registers
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*
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* @return memory size
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*/
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uint8_t phy_dig_reg_backup(bool backup_en, uint32_t *mem_addr);
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#if CONFIG_MAC_BB_PD
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/**
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* @brief Store and load baseband registers.
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*/
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void phy_freq_mem_backup(bool backup_en, uint32_t *mem);
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#endif
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#if CONFIG_ESP_PHY_ENABLE_USB
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/**
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* @brief Enable or disable USB when phy init.
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*/
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void phy_bbpll_en_usb(bool en);
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#endif
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#if CONFIG_IDF_TARGET_ESP32S2
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/**
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* @brief Phy version select for ESP32S2
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*/
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void phy_eco_version_sel(uint8_t chip_ver);
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#endif
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#ifdef __cplusplus
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}
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#endif
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