Ivan Grokhotkov 099565635b soc: correct values of SOC_BYTE_ACCESSIBLE_LOW, SOC_MEM_INTERNAL_LOW ... Internal byte accessible memory starts with Internal ROM 1 at 0x3FF90000. Region of RTC fast memory starting at 0x3FF80000 is not used in IDF as it is mapped to PRO CPU only.		2017-10-19 21:35:21 +08:00
..
esp32	soc: correct values of SOC_BYTE_ACCESSIBLE_LOW, SOC_MEM_INTERNAL_LOW	2017-10-19 21:35:21 +08:00
include/soc	Add logic to make external RAM usable with malloc()	2017-09-28 17:17:50 +08:00
test	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
component.mk	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00