esp-idf/components/esp_system/port/soc/esp32h2
Darian Leung a77e5cc718
refactor(hal/usb): Remove usb_fsls_phy_ll.h
For targets that only contain a USJ peripheral (and not a DWC OTG), their
'usb_fsls_phy_ll.h' headers only contain a single function
('usb_fsls_phy_ll_int_jtag_enable()') whose feature is already covered by
functions in 'usb_serial_jtag_ll.h'. Thus, this header is redundant.

This commit does the following:

- Remove 'usb_fsls_phy_ll.h' for targets that only contain a USJ peripheral
- Rename 'usb_fsls_phy_[hal|ll].[h|c]' to `usb_wrap_[hal|ll].[h|c]` for targets
that contain a DWC OTG peripheral. This better reflects the underlying peripheral
that the LL header accesses.
2024-03-18 19:23:43 +08:00
..
cache_err_int.c refactor(riscv): added a new API for the interrupts 2024-01-18 16:36:53 +08:00
clk.c refactor(hal/usb): Remove usb_fsls_phy_ll.h 2024-03-18 19:23:43 +08:00
CMakeLists.txt feat(esp-system): moved common arch files out to common cmakelist 2023-08-29 16:14:43 +08:00
Kconfig.cpu clk_tree: Add basic clock support for esp32h2 2023-02-20 17:15:02 +08:00
Kconfig.system fix(bod): Fix BOD threshold value on ESP32H2 2023-12-11 16:41:52 +08:00
reset_reason.c fix(system): update reset reasons for C6 and H2 2024-02-20 12:27:09 +08:00
system_internal.c fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions, 2024-01-18 10:51:51 +08:00