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237 lines
9.5 KiB
C
237 lines
9.5 KiB
C
/*
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* xtruntime.h -- general C definitions for single-threaded run-time
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*
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* Copyright (c) 2002-2013 Tensilica Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef XTRUNTIME_H
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#define XTRUNTIME_H
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#include <xtensa/config/core.h>
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#include <xtensa/config/specreg.h>
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#include <xtensa/xtruntime-core-state.h>
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#ifndef XTSTR
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#define _XTSTR(x) # x
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#define XTSTR(x) _XTSTR(x)
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#endif
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/* _xtos_core_shutoff() flags parameter values: */
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#define XTOS_KEEPON_MEM 0x00000100 /* ==PWRCTL_MEM_WAKEUP */
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#define XTOS_KEEPON_MEM_SHIFT 8
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#define XTOS_KEEPON_DEBUG 0x00001000 /* ==PWRCTL_DEBUG_WAKEUP */
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#define XTOS_KEEPON_DEBUG_SHIFT 12
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#define XTOS_IDMA_NO_WAIT 0x00010000 /* Do not wait for idma to finish. Disable if necessary */
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#define XTOS_IDMA_WAIT_STANDBY 0x00020000 /* Also treat standby state as the end of wait */
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#define XTOS_COREF_PSO 0x00000001 /* do power shutoff */
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#define XTOS_COREF_PSO_SHIFT 0
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#define _xtos_set_execption_handler _xtos_set_exception_handler /* backward compatibility */
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#define _xtos_set_saved_intenable _xtos_ints_on /* backward compatibility */
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#define _xtos_clear_saved_intenable _xtos_ints_off /* backward compatibility */
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#if !defined(_ASMLANGUAGE) && !defined(__ASSEMBLER__)
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(XTOS_MISRA)
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typedef void (_xtos_handler_func)(void *);
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#elif defined(__cplusplus)
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typedef void (_xtos_handler_func)(...);
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#else
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typedef void (_xtos_handler_func)(void);
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#endif
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typedef _xtos_handler_func *_xtos_handler;
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/*
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* unsigned XTOS_SET_INTLEVEL(int intlevel);
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* This macro sets the current interrupt level.
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* The 'intlevel' parameter must be a constant.
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* This macro returns a 32-bit value that must be passed to
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* XTOS_RESTORE_INTLEVEL() to restore the previous interrupt level.
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* XTOS_RESTORE_JUST_INTLEVEL() also does this, but in XEA2 configs
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* it restores only PS.INTLEVEL rather than the entire PS register
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* and thus is slower.
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*/
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#if !XCHAL_HAVE_INTERRUPTS
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# define XTOS_SET_INTLEVEL(intlevel) 0
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# define XTOS_SET_MIN_INTLEVEL(intlevel) 0
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# define XTOS_RESTORE_INTLEVEL(restoreval)
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# define XTOS_RESTORE_JUST_INTLEVEL(restoreval)
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#elif XCHAL_HAVE_XEA2
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/* In XEA2, we can simply safely set PS.INTLEVEL directly: */
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/* NOTE: these asm macros don't modify memory, but they are marked
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* as such to act as memory access barriers to the compiler because
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* these macros are sometimes used to delineate critical sections;
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* function calls are natural barriers (the compiler does not know
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* whether a function modifies memory) unless declared to be inlined. */
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# define XTOS_SET_INTLEVEL(intlevel) __extension__({ unsigned __tmp; \
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__asm__ __volatile__( "rsil %0, " XTSTR(intlevel) "\n" \
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: "=a" (__tmp) : : "memory" ); \
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__tmp;})
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# define XTOS_SET_MIN_INTLEVEL(intlevel) ({ unsigned __tmp, __tmp2, __tmp3; \
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__asm__ __volatile__( "rsr.ps %0\n" /* get old (current) PS.INTLEVEL */ \
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"movi %2, " XTSTR(intlevel) "\n" \
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"extui %1, %0, 0, 4\n" /* keep only INTLEVEL bits of parameter */ \
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"blt %2, %1, 1f\n" \
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"rsil %0, " XTSTR(intlevel) "\n" \
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"1:\n" \
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: "=a" (__tmp), "=&a" (__tmp2), "=&a" (__tmp3) : : "memory" ); \
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__tmp;})
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# define XTOS_RESTORE_INTLEVEL(restoreval) do{ unsigned __tmp = (restoreval); \
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__asm__ __volatile__( "wsr.ps %0 ; rsync\n" \
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: : "a" (__tmp) : "memory" ); \
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}while(0)
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# define XTOS_RESTORE_JUST_INTLEVEL(restoreval) _xtos_set_intlevel(restoreval)
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#else
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/* In XEA1, we have to rely on INTENABLE register virtualization: */
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extern unsigned _xtos_set_vpri( unsigned vpri );
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extern unsigned _xtos_vpri_enabled; /* current virtual priority */
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# define XTOS_SET_INTLEVEL(intlevel) _xtos_set_vpri(~XCHAL_INTLEVEL_ANDBELOW_MASK(intlevel))
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# define XTOS_SET_MIN_INTLEVEL(intlevel) _xtos_set_vpri(_xtos_vpri_enabled & ~XCHAL_INTLEVEL_ANDBELOW_MASK(intlevel))
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# define XTOS_RESTORE_INTLEVEL(restoreval) _xtos_set_vpri(restoreval)
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# define XTOS_RESTORE_JUST_INTLEVEL(restoreval) _xtos_set_vpri(restoreval)
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#endif
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/*
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* The following macros build upon the above. They are generally used
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* instead of invoking the SET_INTLEVEL and SET_MIN_INTLEVEL macros directly.
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* They all return a value that can be used with XTOS_RESTORE_INTLEVEL()
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* or _xtos_restore_intlevel() or _xtos_restore_just_intlevel() to restore
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* the effective interrupt level to what it was before the macro was invoked.
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* In XEA2, the DISABLE macros are much faster than the MASK macros
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* (in all configs, DISABLE sets the effective interrupt level, whereas MASK
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* makes ensures the effective interrupt level is at least the level given
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* without lowering it; in XEA2 with INTENABLE virtualization, these macros
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* affect PS.INTLEVEL only, not the virtual priority, so DISABLE has partial
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* MASK semantics).
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*
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* A typical critical section sequence might be:
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* unsigned rval = XTOS_DISABLE_EXCM_INTERRUPTS;
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* ... critical section ...
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* XTOS_RESTORE_INTLEVEL(rval);
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*/
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/* Enable all interrupts (those activated with _xtos_ints_on()): */
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#define XTOS_ENABLE_INTERRUPTS XTOS_SET_INTLEVEL(0)
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/* Disable low priority level interrupts (they can interact with the OS): */
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#define XTOS_DISABLE_LOWPRI_INTERRUPTS XTOS_SET_INTLEVEL(XCHAL_NUM_LOWPRI_LEVELS)
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#define XTOS_MASK_LOWPRI_INTERRUPTS XTOS_SET_MIN_INTLEVEL(XCHAL_NUM_LOWPRI_LEVELS)
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/* Disable interrupts that can interact with the OS: */
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#define XTOS_DISABLE_EXCM_INTERRUPTS XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL)
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#define XTOS_MASK_EXCM_INTERRUPTS XTOS_SET_MIN_INTLEVEL(XCHAL_EXCM_LEVEL)
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#if 0 /* XTOS_LOCK_LEVEL is not exported to applications */
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/* Disable interrupts that can interact with the OS, or manipulate virtual INTENABLE: */
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#define XTOS_DISABLE_LOCK_INTERRUPTS XTOS_SET_INTLEVEL(XTOS_LOCK_LEVEL)
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#define XTOS_MASK_LOCK_INTERRUPTS XTOS_SET_MIN_INTLEVEL(XTOS_LOCK_LEVEL)
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#endif
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/* Disable ALL interrupts (not for common use, particularly if one's processor
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* configuration has high-level interrupts and one cares about their latency): */
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#define XTOS_DISABLE_ALL_INTERRUPTS XTOS_SET_INTLEVEL(15)
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/* These two are deprecated. Use the newer functions below. */
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extern unsigned int _xtos_ints_off( unsigned int mask );
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extern unsigned int _xtos_ints_on( unsigned int mask );
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/* Newer functions to enable/disable the specified interrupt. */
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static inline void _xtos_interrupt_enable(unsigned int intnum)
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{
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_xtos_ints_on(1U << intnum);
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}
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static inline void _xtos_interrupt_disable(unsigned int intnum)
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{
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_xtos_ints_off(1U << intnum);
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}
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extern unsigned _xtos_set_intlevel( int intlevel );
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extern unsigned _xtos_set_min_intlevel( int intlevel );
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extern unsigned _xtos_restore_intlevel( unsigned restoreval );
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extern unsigned _xtos_restore_just_intlevel( unsigned restoreval );
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extern _xtos_handler _xtos_set_interrupt_handler( int n, _xtos_handler f );
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extern _xtos_handler _xtos_set_interrupt_handler_arg( int n, _xtos_handler f, void *arg );
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extern _xtos_handler _xtos_set_exception_handler( int n, _xtos_handler f );
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extern void _xtos_memep_initrams( void );
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extern void _xtos_memep_enable( int flags );
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/* For use with the tiny LSP (see LSP reference manual). */
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#if XCHAL_NUM_INTLEVELS >= 1
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extern void _xtos_dispatch_level1_interrupts( void );
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#endif
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#if XCHAL_NUM_INTLEVELS >= 2
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extern void _xtos_dispatch_level2_interrupts( void );
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#endif
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#if XCHAL_NUM_INTLEVELS >= 3
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extern void _xtos_dispatch_level3_interrupts( void );
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#endif
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#if XCHAL_NUM_INTLEVELS >= 4
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extern void _xtos_dispatch_level4_interrupts( void );
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#endif
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#if XCHAL_NUM_INTLEVELS >= 5
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extern void _xtos_dispatch_level5_interrupts( void );
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#endif
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#if XCHAL_NUM_INTLEVELS >= 6
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extern void _xtos_dispatch_level6_interrupts( void );
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#endif
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/* Deprecated (but kept because they were documented): */
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extern unsigned int _xtos_read_ints( void );
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extern void _xtos_clear_ints( unsigned int mask );
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/* Power shut-off related routines. */
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extern int _xtos_core_shutoff(unsigned flags);
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extern int _xtos_core_save(unsigned flags, XtosCoreState *savearea, void *code);
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extern void _xtos_core_restore(unsigned retvalue, XtosCoreState *savearea);
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#if XCHAL_NUM_CONTEXTS > 1
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extern unsigned _xtos_init_context(int context_num, int stack_size,
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_xtos_handler_func *start_func, int arg1);
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#endif
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/* Deprecated: */
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#if XCHAL_NUM_TIMERS > 0
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extern void _xtos_timer_0_delta( int cycles );
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#endif
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#if XCHAL_NUM_TIMERS > 1
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extern void _xtos_timer_1_delta( int cycles );
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#endif
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#if XCHAL_NUM_TIMERS > 2
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extern void _xtos_timer_2_delta( int cycles );
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#endif
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#if XCHAL_NUM_TIMERS > 3
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extern void _xtos_timer_3_delta( int cycles );
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* !_ASMLANGUAGE && !__ASSEMBLER__ */
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#endif /* XTRUNTIME_H */
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