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https://github.com/espressif/esp-idf.git
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dc6989796a
burst size can affect the buffer alignment
123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include "hal/assert.h"
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#include "hal/gdma_hal.h"
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void gdma_hal_deinit(gdma_hal_context_t *hal)
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{
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hal->generic_dev = NULL;
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}
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void gdma_hal_start_with_desc(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, intptr_t desc_base_addr)
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{
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hal->start_with_desc(hal, chan_id, dir, desc_base_addr);
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}
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void gdma_hal_stop(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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hal->stop(hal, chan_id, dir);
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}
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void gdma_hal_append(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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hal->append(hal, chan_id, dir);
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}
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void gdma_hal_reset(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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hal->reset(hal, chan_id, dir);
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}
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void gdma_hal_set_priority(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t priority)
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{
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hal->set_priority(hal, chan_id, dir, priority);
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}
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void gdma_hal_connect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, gdma_trigger_peripheral_t periph, int periph_sub_id)
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{
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hal->connect_peri(hal, chan_id, dir, periph, periph_sub_id);
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}
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void gdma_hal_disconnect_peri(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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hal->disconnect_peri(hal, chan_id, dir);
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}
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void gdma_hal_enable_burst(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_data_burst, bool en_desc_burst)
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{
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hal->enable_burst(hal, chan_id, dir, en_data_burst, en_desc_burst);
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}
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void gdma_hal_set_burst_size(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t burst_sz)
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{
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if (hal->set_burst_size) {
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hal->set_burst_size(hal, chan_id, dir, burst_sz);
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}
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}
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void gdma_hal_set_strategy(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_owner_check, bool en_desc_write_back, bool eof_till_popped)
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{
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hal->set_strategy(hal, chan_id, dir, en_owner_check, en_desc_write_back, eof_till_popped);
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}
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void gdma_hal_enable_intr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t intr_event_mask, bool en_or_dis)
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{
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hal->enable_intr(hal, chan_id, dir, intr_event_mask, en_or_dis);
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}
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void gdma_hal_clear_intr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, uint32_t intr_event_mask)
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{
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hal->clear_intr(hal, chan_id, dir, intr_event_mask);
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}
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uint32_t gdma_hal_read_intr_status(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool raw)
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{
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return hal->read_intr_status(hal, chan_id, dir, raw);
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}
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uint32_t gdma_hal_get_intr_status_reg(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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return hal->get_intr_status_reg(hal, chan_id, dir);
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}
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uint32_t gdma_hal_get_eof_desc_addr(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool is_success)
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{
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return hal->get_eof_desc_addr(hal, chan_id, dir, is_success);
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}
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void gdma_hal_enable_access_encrypt_mem(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_or_dis)
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{
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if (hal->enable_access_encrypt_mem) {
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hal->enable_access_encrypt_mem(hal, chan_id, dir, en_or_dis);
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}
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}
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#if SOC_GDMA_SUPPORT_CRC
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void gdma_hal_clear_crc(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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hal->clear_crc(hal, chan_id, dir);
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}
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void gdma_hal_set_crc_poly(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, const gdma_hal_crc_config_t *config)
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{
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hal->set_crc_poly(hal, chan_id, dir, config);
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}
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uint32_t gdma_hal_get_crc_result(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir)
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{
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return hal->get_crc_result(hal, chan_id, dir);
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}
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#endif // SOC_GDMA_SUPPORT_CRC
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#if SOC_GDMA_SUPPORT_ETM
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void gdma_hal_enable_etm_task(gdma_hal_context_t *hal, int chan_id, gdma_channel_direction_t dir, bool en_or_dis)
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{
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hal->enable_etm_task(hal, chan_id, dir, en_or_dis);
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}
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#endif // SOC_GDMA_SUPPORT_ETM
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