Ivan Grokhotkov 512898edee sdmmc: fix reads/writes to/from unaligned buffers ... SDMMC hardware treats all buffers as aligned, and ignores 2 LSBs of addresses written into DMA descriptors. Previously SDMMC host driver assumed that data buffers passed from SDDMC command layer would be aligned. However alignment checks were never implemented in the command layer, as were the checks that the buffer coming from the application would be in DMA capable memory. Most of the time this was indeed true. However in some cases FATFS library can pass buffers offset by 2 bytes from word boundary. “DMA capable” restriction may be broken if pSRAM support is used. This change adds buffer checks to the SDMMC host driver (alignment and DMA capability), so that the host layer will error out for incompatible buffers. In SDMMC command layer, a check is added to read and write functions. If an incompatible buffer is passed from the application, new buffer (512 bytes size) is allocated, and the transfer is performed using {READ,WRITE}_SINGLE_BLOCK commands.		2017-08-01 03:15:11 +08:00
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component.mk	sdmmc: add peripheral driver and protocol layer	2017-01-09 04:51:24 +08:00
test_sd.c	sdmmc: fix reads/writes to/from unaligned buffers	2017-08-01 03:15:11 +08:00