mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
393 lines
14 KiB
C
393 lines
14 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include <stdio.h>
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#include "sdkconfig.h"
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#include "esp_types.h"
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#if CONFIG_I2C_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_pm.h"
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#include "freertos/FreeRTOS.h"
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#include "hal/i2c_hal.h"
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#include "hal/gpio_hal.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_rom_gpio.h"
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#include "i2c_private.h"
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#include "driver/gpio.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/i2c_periph.h"
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#include "esp_clk_tree.h"
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#include "clk_ctrl_os.h"
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#include "esp_private/gpio.h"
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#if SOC_LP_I2C_SUPPORTED
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#include "hal/rtc_io_ll.h"
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#include "driver/rtc_io.h"
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#include "soc/rtc_io_channel.h"
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#include "driver/lp_io.h"
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#endif
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
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#include "esp_private/sleep_retention.h"
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#endif
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static const char *TAG = "i2c.common";
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typedef struct i2c_platform_t {
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_lock_t mutex; // platform level mutex lock.
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i2c_bus_handle_t buses[SOC_I2C_NUM]; // array of I2C bus instances.
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uint32_t count[SOC_I2C_NUM]; // reference count used to protect group install/uninstall.
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} i2c_platform_t;
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static i2c_platform_t s_i2c_platform = {}; // singleton platform
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_I2C_SUPPORT_SLEEP_RETENTION
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static esp_err_t s_i2c_sleep_retention_init(void *arg)
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{
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i2c_bus_t *bus = (i2c_bus_t *)arg;
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i2c_port_num_t port_num = bus->port_num;
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esp_err_t ret = sleep_retention_entries_create(i2c_regs_retention[port_num].link_list, i2c_regs_retention[port_num].link_num, REGDMA_LINK_PRI_I2C, I2C_SLEEP_RETENTION_MODULE(port_num));
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ESP_RETURN_ON_ERROR(ret, TAG, "failed to allocate mem for sleep retention");
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return ret;
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}
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#endif
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static esp_err_t s_i2c_bus_handle_acquire(i2c_port_num_t port_num, i2c_bus_handle_t *i2c_new_bus, i2c_bus_mode_t mode)
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{
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#if CONFIG_I2C_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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bool new_bus = false;
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i2c_bus_t *bus = NULL;
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esp_err_t ret = ESP_OK;
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if (!s_i2c_platform.buses[port_num]) {
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new_bus = true;
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bus = heap_caps_calloc(1, sizeof(i2c_bus_t), I2C_MEM_ALLOC_CAPS);
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if (bus) {
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s_i2c_platform.buses[port_num] = bus;
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bus->port_num = port_num;
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bus->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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bus->bus_mode = mode;
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bus->is_lp_i2c = (bus->port_num < SOC_HP_I2C_NUM) ? false : true;
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_I2C_SUPPORT_SLEEP_RETENTION
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if (bus->is_lp_i2c == false) {
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sleep_retention_module_init_param_t init_param = {
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.cbs = { .create = { .handle = s_i2c_sleep_retention_init, .arg = (void *)bus } }
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};
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ret = sleep_retention_module_init(I2C_SLEEP_RETENTION_MODULE(port_num), &init_param);
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if (ret == ESP_OK) {
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sleep_retention_module_allocate(I2C_SLEEP_RETENTION_MODULE(port_num));
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}
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} else {
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ESP_LOGW(TAG, "Detected PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP is enabled while LP_I2C is used. Sleep retention is not supported on LP I2C. Please use it properly");
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}
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#endif
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// Enable the I2C module
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if (!bus->is_lp_i2c) {
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I2C_RCC_ATOMIC() {
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i2c_ll_enable_bus_clock(bus->port_num, true);
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i2c_ll_reset_register(bus->port_num);
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}
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}
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#if SOC_LP_I2C_SUPPORTED
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else {
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LP_I2C_BUS_CLK_ATOMIC() {
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lp_i2c_ll_enable_bus_clock(bus->port_num - SOC_HP_I2C_NUM, true);
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lp_i2c_ll_reset_register(bus->port_num - SOC_HP_I2C_NUM);
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}
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}
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#endif
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I2C_CLOCK_SRC_ATOMIC() {
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i2c_hal_init(&bus->hal, port_num);
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}
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}
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} else {
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ESP_LOGE(TAG, "I2C bus id(%d) has already been acquired", port_num);
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bus = s_i2c_platform.buses[port_num];
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ret = ESP_ERR_INVALID_STATE;
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}
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if (bus) {
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s_i2c_platform.count[port_num]++;
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}
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if (new_bus) {
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ESP_LOGD(TAG, "new bus(%d) at %p", port_num, bus);
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}
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*i2c_new_bus = bus;
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return ret;
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}
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static bool i2c_bus_occupied(i2c_port_num_t port_num)
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{
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return s_i2c_platform.buses[port_num] != NULL;
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}
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esp_err_t i2c_acquire_bus_handle(i2c_port_num_t port_num, i2c_bus_handle_t *i2c_new_bus, i2c_bus_mode_t mode)
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{
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bool bus_occupied = false;
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bool bus_found = false;
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esp_err_t ret = ESP_OK;
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_lock_acquire(&s_i2c_platform.mutex);
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if (port_num == -1) {
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for (int i = 0; i < SOC_HP_I2C_NUM; i++) {
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bus_occupied = i2c_bus_occupied(i);
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if (bus_occupied == false) {
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ret = s_i2c_bus_handle_acquire(i, i2c_new_bus, mode);
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if (ret != ESP_OK) {
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ESP_LOGE(TAG, "acquire bus failed");
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_lock_release(&s_i2c_platform.mutex);
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return ret;
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}
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bus_found = true;
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port_num = i;
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break;
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}
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}
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ESP_RETURN_ON_FALSE((bus_found == true), ESP_ERR_NOT_FOUND, TAG, "acquire bus failed, no free bus");
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} else {
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ret = s_i2c_bus_handle_acquire(port_num, i2c_new_bus, mode);
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if (ret != ESP_OK) {
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ESP_LOGE(TAG, "acquire bus failed");
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}
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}
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_lock_release(&s_i2c_platform.mutex);
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return ret;
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}
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esp_err_t i2c_release_bus_handle(i2c_bus_handle_t i2c_bus)
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{
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int port_num = i2c_bus->port_num;
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i2c_clock_source_t clk_src = i2c_bus->clk_src;
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bool do_deinitialize = false;
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_lock_acquire(&s_i2c_platform.mutex);
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if (s_i2c_platform.buses[port_num]) {
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s_i2c_platform.count[port_num]--;
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if (s_i2c_platform.count[port_num] == 0) {
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do_deinitialize = true;
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s_i2c_platform.buses[port_num] = NULL;
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_I2C_SUPPORT_SLEEP_RETENTION
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if (i2c_bus->is_lp_i2c == false) {
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esp_err_t err = sleep_retention_module_free(I2C_SLEEP_RETENTION_MODULE(port_num));
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if (err == ESP_OK) {
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err = sleep_retention_module_deinit(I2C_SLEEP_RETENTION_MODULE(port_num));
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}
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}
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#endif
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if (i2c_bus->intr_handle) {
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ESP_RETURN_ON_ERROR(esp_intr_free(i2c_bus->intr_handle), TAG, "delete interrupt service failed");
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}
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if (i2c_bus->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_delete(i2c_bus->pm_lock), TAG, "delete pm_lock failed");
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}
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// Disable I2C module
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if (!i2c_bus->is_lp_i2c) {
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I2C_RCC_ATOMIC() {
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i2c_ll_enable_bus_clock(port_num, false);
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}
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}
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#if SOC_LP_I2C_SUPPORTED
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else {
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LP_I2C_BUS_CLK_ATOMIC() {
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lp_i2c_ll_enable_bus_clock(port_num - SOC_HP_I2C_NUM, false);
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}
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}
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#endif
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free(i2c_bus);
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}
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}
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_lock_release(&s_i2c_platform.mutex);
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switch (clk_src) {
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#if SOC_I2C_SUPPORT_RTC
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case I2C_CLK_SRC_RC_FAST:
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periph_rtc_dig_clk8m_disable();
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break;
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#endif // SOC_I2C_SUPPORT_RTC
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default:
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break;
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}
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if (do_deinitialize) {
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ESP_LOGD(TAG, "delete bus %d", port_num);
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}
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ESP_RETURN_ON_FALSE(s_i2c_platform.count[port_num] == 0, ESP_ERR_INVALID_STATE, TAG, "Bus not freed entirely");
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return ESP_OK;
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}
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esp_err_t i2c_select_periph_clock(i2c_bus_handle_t handle, soc_module_clk_t clk_src)
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{
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esp_err_t ret = ESP_OK;
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ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "I2C empty controller handle");
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uint32_t periph_src_clk_hz = 0;
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bool clock_selection_conflict = 0;
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portENTER_CRITICAL(&handle->spinlock);
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if (handle->clk_src == 0) {
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handle->clk_src = clk_src;
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} else {
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clock_selection_conflict = (handle->clk_src != clk_src);
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}
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portEXIT_CRITICAL(&handle->spinlock);
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ESP_RETURN_ON_FALSE(!clock_selection_conflict, ESP_ERR_INVALID_STATE, TAG,
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"group clock conflict, already is %d but attempt to %d", handle->clk_src, clk_src);
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// TODO: [clk_tree] to use a generic clock enable/disable or acquire/release function for all clock source
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#if SOC_I2C_SUPPORT_RTC
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if (clk_src == (soc_module_clk_t)I2C_CLK_SRC_RC_FAST) {
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// RC_FAST clock is not enabled automatically on start up, we enable it here manually.
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// Note there's a ref count in the enable/disable function, we must call them in pair in the driver.
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periph_rtc_dig_clk8m_enable();
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}
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#endif // SOC_I2C_SUPPORT_RTC
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ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz(clk_src, ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX, &periph_src_clk_hz), TAG, "i2c get clock frequency error");
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handle->clk_src_freq_hz = periph_src_clk_hz;
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#if CONFIG_PM_ENABLE
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bool need_pm_lock = true;
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// to make the I2C work reliable, the source clock must stay alive and unchanged
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// driver will create different pm lock for that purpose, according to different clock source
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esp_pm_lock_type_t pm_lock_type = ESP_PM_NO_LIGHT_SLEEP;
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#if SOC_I2C_SUPPORT_RTC
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if (clk_src == (soc_module_clk_t)I2C_CLK_SRC_RC_FAST) {
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// I2C use fifo, which connected to APB, so we cannot use I2C either when in light sleep.
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pm_lock_type = ESP_PM_NO_LIGHT_SLEEP;
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}
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#endif // SOC_I2C_SUPPORT_RTC
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#if SOC_I2C_SUPPORT_APB
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if (clk_src == (soc_module_clk_t)I2C_CLK_SRC_APB) {
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// APB clock frequency can be changed during DFS
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pm_lock_type = ESP_PM_APB_FREQ_MAX;
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}
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#endif // SOC_I2C_SUPPORT_APB
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if (handle->is_lp_i2c) {
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// Even for LP I2C, the clock will also be powered down when going into light sleep.
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pm_lock_type = ESP_PM_NO_LIGHT_SLEEP;
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}
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if (need_pm_lock) {
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sprintf(handle->pm_lock_name, "I2C_%d", handle->port_num); // e.g. PORT_0
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ret = esp_pm_lock_create(pm_lock_type, 0, handle->pm_lock_name, &handle->pm_lock);
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ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed");
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}
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#endif // CONFIG_PM_ENABLE
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ESP_LOGD(TAG, "bus clock source frequency: %"PRIu32"hz", periph_src_clk_hz);
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return ret;
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}
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static esp_err_t s_hp_i2c_pins_config(i2c_bus_handle_t handle)
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{
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int port_id = handle->port_num;
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// SDA pin configurations
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gpio_config_t sda_conf = {
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.intr_type = GPIO_INTR_DISABLE,
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.mode = GPIO_MODE_INPUT_OUTPUT_OD,
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.pull_down_en = false,
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.pull_up_en = handle->pull_up_enable ? GPIO_PULLUP_ENABLE : GPIO_PULLUP_DISABLE,
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.pin_bit_mask = 1ULL << handle->sda_num,
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};
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ESP_RETURN_ON_ERROR(gpio_set_level(handle->sda_num, 1), TAG, "i2c sda pin set level failed");
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ESP_RETURN_ON_ERROR(gpio_config(&sda_conf), TAG, "config GPIO failed");
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gpio_func_sel(handle->sda_num, PIN_FUNC_GPIO);
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esp_rom_gpio_connect_out_signal(handle->sda_num, i2c_periph_signal[port_id].sda_out_sig, 0, 0);
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esp_rom_gpio_connect_in_signal(handle->sda_num, i2c_periph_signal[port_id].sda_in_sig, 0);
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// SCL pin configurations
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gpio_config_t scl_conf = {
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.intr_type = GPIO_INTR_DISABLE,
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.mode = GPIO_MODE_INPUT_OUTPUT_OD,
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.pull_down_en = false,
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.pull_up_en = handle->pull_up_enable ? GPIO_PULLUP_ENABLE : GPIO_PULLUP_DISABLE,
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.pin_bit_mask = 1ULL << handle->scl_num,
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};
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ESP_RETURN_ON_ERROR(gpio_set_level(handle->scl_num, 1), TAG, "i2c scl pin set level failed");
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ESP_RETURN_ON_ERROR(gpio_config(&scl_conf), TAG, "config GPIO failed");
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gpio_func_sel(handle->scl_num, PIN_FUNC_GPIO);
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esp_rom_gpio_connect_out_signal(handle->scl_num, i2c_periph_signal[port_id].scl_out_sig, 0, 0);
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esp_rom_gpio_connect_in_signal(handle->scl_num, i2c_periph_signal[port_id].scl_in_sig, 0);
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return ESP_OK;
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}
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#if SOC_LP_I2C_SUPPORTED
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static esp_err_t s_lp_i2c_pins_config(i2c_bus_handle_t handle)
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{
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ESP_RETURN_ON_ERROR(!rtc_gpio_is_valid_gpio(handle->sda_num), TAG, "LP I2C SDA GPIO invalid");
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ESP_RETURN_ON_ERROR(!rtc_gpio_is_valid_gpio(handle->scl_num), TAG, "LP I2C SCL GPIO invalid");
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#if !SOC_LP_GPIO_MATRIX_SUPPORTED
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/* Verify that the SDA and SCL line belong to the LP IO Mux I2C function group */
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ESP_RETURN_ON_FALSE((handle->sda_num == LP_I2C_SDA_IOMUX_PAD), ESP_ERR_INVALID_ARG, TAG, LP_I2C_SDA_PIN_ERR_LOG);
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ESP_RETURN_ON_FALSE((handle->scl_num == LP_I2C_SCL_IOMUX_PAD), ESP_ERR_INVALID_ARG, TAG, LP_I2C_SCL_PIN_ERR_LOG);
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#endif /* !SOC_LP_GPIO_MATRIX_SUPPORTED */
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int port_id = handle->port_num;
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rtc_gpio_init(handle->sda_num);
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rtc_gpio_set_direction(handle->sda_num, RTC_GPIO_MODE_INPUT_OUTPUT_OD);
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rtc_gpio_pulldown_dis(handle->sda_num);
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if (handle->pull_up_enable) {
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rtc_gpio_pullup_en(handle->sda_num);
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} else {
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rtc_gpio_pullup_dis(handle->sda_num);
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}
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#if !SOC_LP_GPIO_MATRIX_SUPPORTED
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rtc_gpio_iomux_func_sel(handle->sda_num, i2c_periph_signal[port_id].iomux_func);
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#else
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lp_gpio_connect_out_signal(handle->sda_num, i2c_periph_signal[port_id].scl_out_sig, 0, 0);
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lp_gpio_connect_in_signal(handle->sda_num, i2c_periph_signal[port_id].scl_in_sig, 0);
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#endif
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rtc_gpio_init(handle->scl_num);
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rtc_gpio_set_direction(handle->scl_num, RTC_GPIO_MODE_INPUT_OUTPUT_OD);
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rtc_gpio_pulldown_dis(handle->scl_num);
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if (handle->pull_up_enable) {
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rtc_gpio_pullup_en(handle->scl_num);
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} else {
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rtc_gpio_pullup_dis(handle->scl_num);
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}
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#if !SOC_LP_GPIO_MATRIX_SUPPORTED
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rtc_gpio_iomux_func_sel(handle->scl_num, i2c_periph_signal[port_id].iomux_func);
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#else
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lp_gpio_connect_out_signal(handle->scl_num, i2c_periph_signal[port_id].sda_out_sig, 0, 0);
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lp_gpio_connect_in_signal(handle->scl_num, i2c_periph_signal[port_id].sda_in_sig, 0);
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#endif
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return ESP_OK;
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}
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#endif // SOC_LP_I2C_SUPPORTED
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esp_err_t i2c_common_set_pins(i2c_bus_handle_t handle)
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{
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esp_err_t ret = ESP_OK;
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if (handle->is_lp_i2c == false) {
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ESP_RETURN_ON_ERROR(s_hp_i2c_pins_config(handle), TAG, "config i2c pins failed");
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}
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#if SOC_LP_I2C_SUPPORTED
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else {
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ESP_RETURN_ON_ERROR(s_lp_i2c_pins_config(handle), TAG, "config i2c lp pins failed");
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}
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#endif
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return ret;
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}
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