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2c2a62e323
- Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32h2
53 lines
1.5 KiB
C
53 lines
1.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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/**
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* @file regi2c_pmu.h
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* @brief Register definitions for digital to get rtc voltage & digital voltage
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* by setting rtc_dbias_Wak & dig_dbias_wak or by analog self-calibration.
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*/
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#define I2C_PMU 0x6d
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#define I2C_PMU_HOSTID 0
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#define I2C_PMU_EN_I2C_RTC_DREG 8
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#define I2C_PMU_EN_I2C_RTC_DREG_MSB 0
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#define I2C_PMU_EN_I2C_RTC_DREG_LSB 0
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#define I2C_PMU_EN_I2C_DIG_DREG 8
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#define I2C_PMU_EN_I2C_DIG_DREG_MSB 1
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#define I2C_PMU_EN_I2C_DIG_DREG_LSB 1
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#define I2C_PMU_EN_I2C_RTC_DREG_SLP 8
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#define I2C_PMU_EN_I2C_RTC_DREG_SLP_MSB 2
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#define I2C_PMU_EN_I2C_RTC_DREG_SLP_LSB 2
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#define I2C_PMU_EN_I2C_DIG_DREG_SLP 8
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#define I2C_PMU_EN_I2C_DIG_DREG_SLP_MSB 3
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#define I2C_PMU_EN_I2C_DIG_DREG_SLP_LSB 3
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#define I2C_PMU_OR_XPD_RTC_REG 9
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#define I2C_PMU_OR_XPD_RTC_REG_MSB 4
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#define I2C_PMU_OR_XPD_RTC_REG_LSB 4
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#define I2C_PMU_OR_XPD_DIG_REG 9
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#define I2C_PMU_OR_XPD_DIG_REG_MSB 5
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#define I2C_PMU_OR_XPD_DIG_REG_LSB 5
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#define I2C_PMU_OC_SCK_DCAP 14
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#define I2C_PMU_OC_SCK_DCAP_MSB 7
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#define I2C_PMU_OC_SCK_DCAP_LSB 0
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#define I2C_PMU_OR_XPD_TRX 15
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#define I2C_PMU_OR_XPD_TRX_MSB 2
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#define I2C_PMU_OR_XPD_TRX_LSB 2
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#define I2C_PMU_SEL_PLL8M_REF 21
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#define I2C_PMU_SEL_PLL8M_REF_MSB 6
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#define I2C_PMU_SEL_PLL8M_REF_LSB 6
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