esp-idf/components/riscv
Sachin Parekh aad1f7abde stdatomic: Implemented legacy __sync APIs and __atomic_exchange_n
These APIs are used when the architecture doesn't have atomic
instruction support

Closes https://github.com/espressif/esp-idf/issues/6463
2021-04-27 13:34:54 +05:30
..
include Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 2021-01-27 08:44:03 +01:00
CMakeLists.txt interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
expression_with_stack_riscv_asm.S esp32c3: format and clean up interrupt and os port code 2021-01-05 15:39:46 +08:00
expression_with_stack_riscv.c system: enable shared stack watchpoint 2021-02-19 16:59:29 +08:00
instruction_decode.c interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
interrupt.c interrupt: removed descriptor table from esp32c3 interrupt hal. 2021-01-05 15:39:46 +08:00
linker.lf riscv: Place stdatomic file in iram 2020-12-24 14:18:01 +11:00
stdatomic.c stdatomic: Implemented legacy __sync APIs and __atomic_exchange_n 2021-04-27 13:34:54 +05:30
vectors.S Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 2021-01-27 08:44:03 +01:00