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https://github.com/espressif/esp-idf.git
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e22b4007d3
The following files were deleted: - components/esp_hw_support/include/soc/cpu.h - components/soc/esp32s3/include/soc/cpu.h The following functions are deprecated: - get_sp() The following functions declared in soc/cpu.h are now moved to esp_cpu.h: - esp_cpu_configure_region_protection() The following functions declared in soc/cpu.h are now moved to components/xtensa/include/esp_cpu_utils.h: - esp_cpu_process_stack_pc() All files with soc/cpu.h inclusion are updated to include esp_cpu.h instead. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
280 lines
7.1 KiB
C
280 lines
7.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include <math.h>
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#include <stdio.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "unity.h"
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#include "test_utils.h"
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/* Note: these functions are included here for unit test purposes. They are not needed for writing
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* normal code. If writing standard C floating point code, libgcc should correctly include implementations
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* that use the floating point registers correctly. */
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static float addsf(float a, float b)
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{
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float result;
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asm volatile (
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"wfr f0, %1\n"
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"wfr f1, %2\n"
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"add.s f2, f0, f1\n"
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"rfr %0, f2\n"
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:"=r"(result):"r"(a), "r"(b)
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);
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return result;
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}
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static float mulsf(float a, float b)
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{
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float result;
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asm volatile (
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"wfr f0, %1\n"
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"wfr f1, %2\n"
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"mul.s f2, f0, f1\n"
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"rfr %0, f2\n"
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:"=r"(result):"r"(a), "r"(b)
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);
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return result;
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}
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static float divsf(float a, float b)
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{
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float result;
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asm volatile (
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"wfr f0, %1\n"
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"wfr f1, %2\n"
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"div0.s f3, f1 \n"
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"nexp01.s f4, f1 \n"
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"const.s f5, 1 \n"
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"maddn.s f5, f4, f3 \n"
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"mov.s f6, f3 \n"
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"mov.s f7, f1 \n"
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"nexp01.s f8, f0 \n"
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"maddn.s f6, f5, f3 \n"
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"const.s f5, 1 \n"
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"const.s f2, 0 \n"
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"neg.s f9, f8 \n"
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"maddn.s f5,f4,f6 \n"
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"maddn.s f2, f9, f3 \n"
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"mkdadj.s f7, f0 \n"
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"maddn.s f6,f5,f6 \n"
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"maddn.s f9,f4,f2 \n"
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"const.s f5, 1 \n"
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"maddn.s f5,f4,f6 \n"
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"maddn.s f2,f9,f6 \n"
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"neg.s f9, f8 \n"
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"maddn.s f6,f5,f6 \n"
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"maddn.s f9,f4,f2 \n"
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"addexpm.s f2, f7 \n"
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"addexp.s f6, f7 \n"
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"divn.s f2,f9,f6\n"
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"rfr %0, f2\n"
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:"=r"(result):"r"(a), "r"(b)
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);
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return result;
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}
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static float sqrtsf(float a)
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{
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float result;
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asm volatile (
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"wfr f0, %1\n"
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"sqrt0.s f2, f0\n"
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"const.s f5, 0\n"
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"maddn.s f5, f2, f2\n"
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"nexp01.s f3, f0\n"
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"const.s f4, 3\n"
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"addexp.s f3, f4\n"
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"maddn.s f4, f5, f3\n"
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"nexp01.s f5, f0\n"
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"neg.s f6, f5\n"
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"maddn.s f2, f4, f2\n"
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"const.s f1, 0\n"
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"const.s f4, 0\n"
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"const.s f7, 0\n"
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"maddn.s f1, f6, f2\n"
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"maddn.s f4, f2, f3\n"
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"const.s f6, 3\n"
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"maddn.s f7, f6, f2\n"
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"maddn.s f5, f1, f1\n"
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"maddn.s f6, f4, f2\n"
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"neg.s f3, f7\n"
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"maddn.s f1, f5, f3\n"
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"maddn.s f7, f6, f7\n"
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"mksadj.s f2, f0\n"
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"nexp01.s f5, f0\n"
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"maddn.s f5, f1, f1\n"
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"neg.s f3, f7\n"
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"addexpm.s f1, f2\n"
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"addexp.s f3, f2\n"
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"divn.s f1, f5, f3\n"
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"rfr %0, f1\n"
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:"=r"(result):"r"(a)
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);
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return result;
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}
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TEST_CASE("test FP add", "[fp]")
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{
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float a = 100.0f;
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float b = 0.5f;
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float c = addsf(a, b);
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float eps = c - 100.5f;
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printf("a=%g b=%g c=%g eps=%g\r\n", a, b, c, eps);
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TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
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}
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TEST_CASE("test FP mul", "[fp]")
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{
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float a = 100.0f;
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float b = 0.05f;
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float c = mulsf(a, b);
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float eps = c - 5.0f;
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printf("a=%g b=%g c=%g eps=%g\r\n", a, b, c, eps);
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TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
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}
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TEST_CASE("test FP div", "[fp]")
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{
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float a = 100.0f;
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float b = 5.0f;
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float c = divsf(a, b);
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float eps = c - 20.0f;
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printf("a=%g b=%g c=%g eps=%g\r\n", a, b, c, eps);
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TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
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}
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TEST_CASE("test FP sqrt", "[fp]")
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{
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float a = 100.0f;
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float c = sqrtsf(a);
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float eps = c - 10.0f;
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printf("a=%g c=%g eps=%g\r\n", a, c, eps);
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TEST_ASSERT_TRUE(fabs(eps) < 0.000001);
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}
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struct TestFPState {
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int fail;
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SemaphoreHandle_t done;
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};
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static const int testFpIter = 100000;
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static void tskTestFP(void *pvParameters)
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{
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struct TestFPState *state = (struct TestFPState *) pvParameters;
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for (int i = 0; i < testFpIter; ++i) {
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// calculate zero in a slightly obscure way
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float y = sqrtsf(addsf(1.0f, divsf(mulsf(sqrtsf(2), sqrtsf(2)), 2.0f)));
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y = mulsf(y, y);
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y = addsf(y, -2.0f);
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// check that result is not far from zero
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float eps = fabs(y);
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if (eps > 1e-6f) {
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state->fail++;
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printf("%s: i=%d y=%f eps=%f\r\n", __func__, i, y, eps);
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}
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}
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TEST_ASSERT(xSemaphoreGive(state->done));
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vTaskDelete(NULL);
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}
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TEST_CASE("context switch saves FP registers", "[fp]")
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{
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struct TestFPState state = {
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.done = xSemaphoreCreateCounting(4, 0)
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};
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TEST_ASSERT_NOT_NULL(state.done);
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const int prio = UNITY_FREERTOS_PRIORITY + 1;
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TEST_ASSERT(xTaskCreatePinnedToCore(tskTestFP, "tsk1", 2048, &state, prio, NULL, 0));
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TEST_ASSERT(xTaskCreatePinnedToCore(tskTestFP, "tsk2", 2048, &state, prio, NULL, 0));
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TEST_ASSERT(xTaskCreatePinnedToCore(tskTestFP, "tsk3", 2048, &state, prio, NULL, portNUM_PROCESSORS - 1));
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TEST_ASSERT(xTaskCreatePinnedToCore(tskTestFP, "tsk4", 2048, &state, prio, NULL, 0));
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for (int i = 0; i < 4; ++i) {
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TEST_ASSERT(xSemaphoreTake(state.done, pdMS_TO_TICKS(5000)));
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}
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vSemaphoreDelete(state.done);
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if (state.fail) {
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const int total = testFpIter * 4;
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printf("Failed: %d, total: %d\r\n", state.fail, total);
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}
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TEST_ASSERT(state.fail == 0);
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}
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/* Note: not static, to avoid optimisation of const result */
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float IRAM_ATTR test_fp_benchmark_fp_divide(int counts, unsigned *cycles)
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{
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float f = MAXFLOAT;
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uint32_t before, after;
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RSR(CCOUNT, before);
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for (int i = 0; i < counts; i++) {
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f /= 1.000432f;
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}
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RSR(CCOUNT, after);
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*cycles = (after - before) / counts;
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return f;
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}
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TEST_CASE("floating point division performance", "[fp]")
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{
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const unsigned COUNTS = 1000;
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unsigned cycles = 0;
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// initialize fpu
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volatile __attribute__((unused)) float dummy = sqrtf(rand());
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float f = test_fp_benchmark_fp_divide(COUNTS, &cycles);
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printf("%d divisions from %f = %f\n", COUNTS, MAXFLOAT, f);
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printf("Per division = %d cycles\n", cycles);
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TEST_PERFORMANCE_LESS_THAN(CYCLES_PER_DIV, "%d cycles", cycles);
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}
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/* Note: not static, to avoid optimisation of const result */
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float IRAM_ATTR test_fp_benchmark_fp_sqrt(int counts, unsigned *cycles)
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{
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float f = MAXFLOAT;
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uint32_t before, after;
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RSR(CCOUNT, before);
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for (int i = 0; i < counts; i++) {
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f = sqrtf(f);
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}
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RSR(CCOUNT, after);
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*cycles = (after - before) / counts;
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return f;
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}
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TEST_CASE("floating point square root performance", "[fp]")
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{
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const unsigned COUNTS = 200;
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unsigned cycles = 0;
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// initialize fpu
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volatile float __attribute__((unused)) dummy = sqrtf(rand());
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float f = test_fp_benchmark_fp_sqrt(COUNTS, &cycles);
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printf("%d square roots from %f = %f\n", COUNTS, MAXFLOAT, f);
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printf("Per sqrt = %d cycles\n", cycles);
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TEST_PERFORMANCE_LESS_THAN(CYCLES_PER_SQRT, "%d cycles", cycles);
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}
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#endif // CONFIG_IDF_TARGET_ESP32
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