mirror of
https://github.com/espressif/esp-idf.git
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4776f73ca4
All peripheral clocks are default enabled after chip is powered on. When CPU starts, if reset reason is CPU reset, disable those clocks that are not enabled before reset. Otherwise, disable all those useless clocks. These peripheral clocks must be enabled when the peripherals are initialized and disabled when they are deinitialized.
356 lines
11 KiB
C
356 lines
11 KiB
C
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <string.h>
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "rom/ets_sys.h"
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#include "rom/uart.h"
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#include "rom/rtc.h"
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#include "rom/cache.h"
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#include "soc/cpu.h"
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#include "soc/rtc.h"
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#include "soc/dport_reg.h"
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#include "soc/io_mux_reg.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/timer_group_reg.h"
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#include "driver/rtc_io.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "freertos/portmacro.h"
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#include "tcpip_adapter.h"
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#include "esp_heap_caps.h"
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#include "sdkconfig.h"
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#include "esp_system.h"
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#include "esp_spi_flash.h"
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#include "nvs_flash.h"
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#include "esp_event.h"
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#include "esp_spi_flash.h"
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#include "esp_ipc.h"
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#include "esp_crosscore_int.h"
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#include "esp_dport_access.h"
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#include "esp_log.h"
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#include "esp_vfs_dev.h"
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#include "esp_newlib.h"
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#include "esp_brownout.h"
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#include "esp_int_wdt.h"
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#include "esp_task_wdt.h"
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#include "esp_phy_init.h"
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#include "esp_cache_err_int.h"
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#include "esp_coexist.h"
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#include "esp_panic.h"
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#include "esp_core_dump.h"
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#include "esp_app_trace.h"
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#include "esp_clk.h"
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#include "esp_timer.h"
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#include "trax.h"
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#define STRINGIFY(s) STRINGIFY2(s)
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#define STRINGIFY2(s) #s
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void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default"))) __attribute__((noreturn));
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void start_cpu0_default(void) IRAM_ATTR __attribute__((noreturn));
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#if !CONFIG_FREERTOS_UNICORE
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static void IRAM_ATTR call_start_cpu1() __attribute__((noreturn));
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void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default"))) __attribute__((noreturn));
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void start_cpu1_default(void) IRAM_ATTR __attribute__((noreturn));
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static bool app_cpu_started = false;
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#endif //!CONFIG_FREERTOS_UNICORE
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static void do_global_ctors(void);
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static void main_task(void* args);
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extern void app_main(void);
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extern int _bss_start;
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extern int _bss_end;
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extern int _rtc_bss_start;
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extern int _rtc_bss_end;
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extern int _init_start;
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extern void (*__init_array_start)(void);
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extern void (*__init_array_end)(void);
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extern volatile int port_xSchedulerRunning[2];
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static const char* TAG = "cpu_start";
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/*
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* We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
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* and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
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*/
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void IRAM_ATTR call_start_cpu0()
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{
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#if CONFIG_FREERTOS_UNICORE
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RESET_REASON rst_reas[1];
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#else
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RESET_REASON rst_reas[2];
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#endif
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cpu_configure_region_protection();
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//Move exception vectors to IRAM
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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rst_reas[0] = rtc_get_reset_reason(0);
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#if !CONFIG_FREERTOS_UNICORE
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rst_reas[1] = rtc_get_reset_reason(1);
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#endif
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// from panic handler we can be reset by RWDT or TG0WDT
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if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET
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#if !CONFIG_FREERTOS_UNICORE
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|| rst_reas[1] == RTCWDT_SYS_RESET || rst_reas[1] == TG0WDT_SYS_RESET
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#endif
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) {
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esp_panic_wdt_stop();
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}
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// Temporary workaround for an ugly crash, until we allow > 192KB of static DRAM
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if ((intptr_t)&_bss_end > 0x3FFE0000) {
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// Can't use assert() or logging here because there's no .bss
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ets_printf("ERROR: Static .bss section extends past 0x3FFE0000. IDF cannot boot.\n");
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abort();
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}
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//Clear BSS. Please do not attempt to do any complex stuff (like early logging) before this.
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memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
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/* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
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if (rst_reas[0] != DEEPSLEEP_RESET) {
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memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
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}
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ESP_EARLY_LOGI(TAG, "Pro cpu up.");
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#if !CONFIG_FREERTOS_UNICORE
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ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
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//Flush and enable icache for APP CPU
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Cache_Flush(1);
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Cache_Read_Enable(1);
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esp_cpu_unstall(1);
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// Enable clock and reset APP CPU. Note that OpenOCD may have already
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// enabled clock and taken APP CPU out of reset. In this case don't reset
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// APP CPU again, as that will clear the breakpoints which may have already
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// been set.
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if (!DPORT_GET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN)) {
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DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
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DPORT_SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
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}
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ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
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while (!app_cpu_started) {
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ets_delay_us(100);
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}
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#else
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ESP_EARLY_LOGI(TAG, "Single core mode");
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DPORT_CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
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#endif
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/* Initialize heap allocator. WARNING: This *needs* to happen *after* the app cpu has booted.
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If the heap allocator is initialized first, it will put free memory linked list items into
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memory also used by the ROM. Starting the app cpu will let its ROM initialize that memory,
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corrupting those linked lists. Initializing the allocator *after* the app cpu has booted
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works around this problem. */
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heap_caps_init();
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ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
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start_cpu0();
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}
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#if !CONFIG_FREERTOS_UNICORE
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static void wdt_reset_cpu1_info_enable(void)
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{
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DPORT_REG_SET_BIT(DPORT_APP_CPU_RECORD_CTRL_REG, DPORT_APP_CPU_PDEBUG_ENABLE | DPORT_APP_CPU_RECORD_ENABLE);
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DPORT_REG_CLR_BIT(DPORT_APP_CPU_RECORD_CTRL_REG, DPORT_APP_CPU_RECORD_ENABLE);
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}
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void IRAM_ATTR call_start_cpu1()
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{
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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ets_set_appcpu_boot_addr(0);
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cpu_configure_region_protection();
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#if CONFIG_CONSOLE_UART_NONE
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ets_install_putc1(NULL);
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ets_install_putc2(NULL);
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#else // CONFIG_CONSOLE_UART_NONE
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uartAttach();
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ets_install_uart_printf();
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uart_tx_switch(CONFIG_CONSOLE_UART_NUM);
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#endif
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wdt_reset_cpu1_info_enable();
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ESP_EARLY_LOGI(TAG, "App cpu up.");
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app_cpu_started = 1;
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start_cpu1();
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}
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#endif //!CONFIG_FREERTOS_UNICORE
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static void intr_matrix_clear(void)
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{
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//Clear all the interrupt matrix register
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for (int i = ETS_WIFI_MAC_INTR_SOURCE; i <= ETS_CACHE_IA_INTR_SOURCE; i++) {
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intr_matrix_set(0, i, ETS_INVALID_INUM);
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#if !CONFIG_FREERTOS_UNICORE
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intr_matrix_set(1, i, ETS_INVALID_INUM);
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#endif
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}
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}
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void start_cpu0_default(void)
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{
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esp_setup_syscall_table();
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//Enable trace memory and immediately start trace.
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#if CONFIG_ESP32_TRAX
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#if CONFIG_ESP32_TRAX_TWOBANKS
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trax_enable(TRAX_ENA_PRO_APP);
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#else
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trax_enable(TRAX_ENA_PRO);
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#endif
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trax_start_trace(TRAX_DOWNCOUNT_WORDS);
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#endif
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esp_clk_init();
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esp_perip_clk_init();
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intr_matrix_clear();
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#ifndef CONFIG_CONSOLE_UART_NONE
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uart_div_modify(CONFIG_CONSOLE_UART_NUM, (rtc_clk_apb_freq_get() << 4) / CONFIG_CONSOLE_UART_BAUDRATE);
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#endif
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#if CONFIG_BROWNOUT_DET
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esp_brownout_init();
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#endif
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rtc_gpio_force_hold_dis_all();
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esp_vfs_dev_uart_register();
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esp_reent_init(_GLOBAL_REENT);
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#ifndef CONFIG_CONSOLE_UART_NONE
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const char* default_uart_dev = "/dev/uart/" STRINGIFY(CONFIG_CONSOLE_UART_NUM);
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_GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
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_GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
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_GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
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#else
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_GLOBAL_REENT->_stdin = (FILE*) &__sf_fake_stdin;
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_GLOBAL_REENT->_stdout = (FILE*) &__sf_fake_stdout;
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_GLOBAL_REENT->_stderr = (FILE*) &__sf_fake_stderr;
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#endif
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esp_timer_init();
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esp_setup_time_syscalls();
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#if CONFIG_ESP32_APPTRACE_ENABLE
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esp_err_t err = esp_apptrace_init();
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "Failed to init apptrace module on CPU0 (%d)!", err);
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}
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#endif
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#if CONFIG_SYSVIEW_ENABLE
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SEGGER_SYSVIEW_Conf();
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#endif
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do_global_ctors();
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#if CONFIG_INT_WDT
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esp_int_wdt_init();
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#endif
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#if CONFIG_TASK_WDT
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esp_task_wdt_init();
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#endif
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esp_cache_err_int_init();
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esp_crosscore_int_init();
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esp_ipc_init();
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#ifndef CONFIG_FREERTOS_UNICORE
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esp_dport_access_int_init();
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#endif
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spi_flash_init();
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/* init default OS-aware flash access critical section */
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spi_flash_guard_set(&g_flash_guard_default_ops);
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#if CONFIG_ESP32_ENABLE_COREDUMP
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esp_core_dump_init();
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#endif
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portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
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ESP_TASK_MAIN_STACK, NULL,
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ESP_TASK_MAIN_PRIO, NULL, 0);
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assert(res == pdTRUE);
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ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
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vTaskStartScheduler();
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abort(); /* Only get to here if not enough free heap to start scheduler */
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}
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#if !CONFIG_FREERTOS_UNICORE
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void start_cpu1_default(void)
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{
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#if CONFIG_ESP32_TRAX_TWOBANKS
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trax_start_trace(TRAX_DOWNCOUNT_WORDS);
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#endif
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#if CONFIG_ESP32_APPTRACE_ENABLE
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esp_err_t err = esp_apptrace_init();
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if (err != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "Failed to init apptrace module on CPU1 (%d)!", err);
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}
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#endif
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// Wait for FreeRTOS initialization to finish on PRO CPU
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while (port_xSchedulerRunning[0] == 0) {
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;
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}
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//Take care putting stuff here: if asked, FreeRTOS will happily tell you the scheduler
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//has started, but it isn't active *on this CPU* yet.
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esp_cache_err_int_init();
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esp_crosscore_int_init();
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esp_dport_access_int_init();
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ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
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xPortStartScheduler();
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abort(); /* Only get to here if FreeRTOS somehow very broken */
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}
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#endif //!CONFIG_FREERTOS_UNICORE
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static void do_global_ctors(void)
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{
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void (**p)(void);
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for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
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(*p)();
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}
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}
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static void main_task(void* args)
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{
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// Now that the application is about to start, disable boot watchdogs
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REG_CLR_BIT(TIMG_WDTCONFIG0_REG(0), TIMG_WDT_FLASHBOOT_MOD_EN_S);
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REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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#if !CONFIG_FREERTOS_UNICORE
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// Wait for FreeRTOS initialization to finish on APP CPU, before replacing its startup stack
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while (port_xSchedulerRunning[1] == 0) {
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;
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}
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#endif
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//Enable allocation in region where the startup stacks were located.
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heap_caps_enable_nonos_stack_heaps();
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app_main();
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vTaskDelete(NULL);
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}
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