esp-idf/components/soc/src
houwenxiang 46713a5275 driver(uart): fix uart module reset issue
On ESP32, due to fifo reset issue, UART2 will work incorrectly if reset the fifo of UART1(TX fifo and RX fifo). The software can workaround the RX fifo reset issue,

        while the TX fifo reset issue can not. When UART2 is used and UART1 is used as the log output port, a software reset can reproduce this issue. So we should reset the UART memory

        before the software reset to solve this problem.
2020-06-01 11:01:26 +08:00
..
esp32 driver(uart): fix uart module reset issue 2020-06-01 11:01:26 +08:00
esp32s2 Merge branch 'feature/allow_rtc_memory_for_task_stacks' into 'master' 2020-05-29 14:07:01 +08:00
hal Merge branch 'bugfix/fix_rmt_driver_breaking_change_issue' into 'master' 2020-05-25 15:27:24 +08:00
compare_set.c spin_lock: added new spinlock interface and decoupled it from RTOS 2020-01-22 06:20:34 +08:00
cpu_util.c esp32, esp32s2: move panic handling code to new component 2020-03-10 19:56:24 +08:00
lldesc.c spi_master: refactor and add HAL support 2019-03-28 17:14:50 +08:00
memory_layout_utils.c heap: add rtc fast memory region to dynamic pool 2020-05-14 13:12:26 +00:00
soc_include_legacy_warn.c global: move the soc component out of the common list 2019-04-16 13:21:15 +08:00