Sudeep Mohanty 459ff8348f fix(riscv): Added RISC-V functions to set interrupt threshold for CLIC targets ... This commit added the RISC-V utility functions to set the interrupt threshold for CLIC targets by using direct register value writes. This makes the functions more efficient during run-time. This is done to improve the critical section enter and exit performance on esp32p4.		2024-02-28 08:51:37 +01:00
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esp32	feat(sdio): sdio cross chip test app	2023-11-13 11:21:47 +08:00
esp32c2	refactor(spi_master): replace dma_ll in spi hal layer (part 2.1)	2023-12-28 19:58:54 +08:00
esp32c3	spi: add high freq test on different spi config	2023-02-27 11:27:57 +08:00
esp32c5	feat(esp32c5): introduce target esp32c5	2023-11-28 16:14:17 +08:00
esp32c6	feat(sdio): sdio cross chip test app	2023-11-13 11:21:47 +08:00
esp32h2	feat(esp_timer): Re-enable tests on ESP32P4	2024-01-30 13:39:23 +02:00
esp32p4	fix(riscv): Added RISC-V functions to set interrupt threshold for CLIC targets	2024-02-28 08:51:37 +01:00
esp32s2	spi: add high freq test on different spi config	2023-02-27 11:27:57 +08:00
esp32s3	spi: add high freq test on different spi config	2023-02-27 11:27:57 +08:00
idf_performance.h	feat(sdio): sdio cross chip test app	2023-11-13 11:21:47 +08:00