esp-idf/components/freertos/FreeRTOS-Kernel/portable
Sudeep Mohanty 459ff8348f fix(riscv): Added RISC-V functions to set interrupt threshold for CLIC targets
This commit added the RISC-V utility functions to set the interrupt
threshold for CLIC targets by using direct register value writes.
This makes the functions more efficient during run-time.
This is done to improve the critical section enter and exit performance on esp32p4.
2024-02-28 08:51:37 +01:00
..
linux feat(coredump): improve the probability of accessing healthy TCBs 2024-01-22 00:18:28 +08:00
riscv fix(riscv): Added RISC-V functions to set interrupt threshold for CLIC targets 2024-02-28 08:51:37 +01:00
xtensa feat(coredump): improve the probability of accessing healthy TCBs 2024-01-22 00:18:28 +08:00