esp-idf/components/soc
Jiang Jiang Jian 29f999361e Merge branch 'bugfix/assert_in_PSRAM_WIFI' into 'master'
bug fix of assert happen in PSRAM

See merge request !1745
2018-01-10 16:48:04 +08:00
..
esp32 Merge branch 'bugfix/assert_in_PSRAM_WIFI' into 'master' 2018-01-10 16:48:04 +08:00
include/soc Add logic to make external RAM usable with malloc() 2017-09-28 17:17:50 +08:00
test soc: add source code of rtc_clk, rtc_pm 2017-04-11 15:45:54 +08:00
component.mk Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00