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8143832041
Add support for 8-line spi for lcd on esp32s2 and esp32s3 Closes https://github.com/espressif/esp-idf/issues/6371
50 lines
2.0 KiB
C
50 lines
2.0 KiB
C
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#define SPI_FUNC_NUM 0
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#define SPI_IOMUX_PIN_NUM_HD 27
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#define SPI_IOMUX_PIN_NUM_CS 29
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#define SPI_IOMUX_PIN_NUM_MOSI 32
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#define SPI_IOMUX_PIN_NUM_CLK 30
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#define SPI_IOMUX_PIN_NUM_MISO 31
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#define SPI_IOMUX_PIN_NUM_WP 28
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// There are 2 sets of GPIO pins which could be routed to FSPICS0, FSPICLK, FSPID, FSPIQ, FSPIHD, FSPIWP.
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// However, there is only one set of GPIO pins which could be routed to FSPIIO4, FSPIIO5, FSPIIO6, FSPIIO7.
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// As default (when we are not going to use Octal SPI), we make use of SPI2_FUNC_NUM to route one of the 2 sets of GPIO pins to FSPICS0 ~ FSPIWP as follows.
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#define SPI2_FUNC_NUM 4
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#define SPI2_IOMUX_PIN_NUM_HD 9
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#define SPI2_IOMUX_PIN_NUM_CS 10
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#define SPI2_IOMUX_PIN_NUM_MOSI 11
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#define SPI2_IOMUX_PIN_NUM_CLK 12
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#define SPI2_IOMUX_PIN_NUM_MISO 13
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#define SPI2_IOMUX_PIN_NUM_WP 14
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// When using Octal SPI, we make use of SPI2_FUNC_NUM_OCT to route them as follows.
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#define SPI2_FUNC_NUM_OCT 2
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#define SPI2_IOMUX_PIN_NUM_HD_OCT 33
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#define SPI2_IOMUX_PIN_NUM_CS_OCT 34
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#define SPI2_IOMUX_PIN_NUM_MOSI_OCT 35
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#define SPI2_IOMUX_PIN_NUM_CLK_OCT 36
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#define SPI2_IOMUX_PIN_NUM_MISO_OCT 37
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#define SPI2_IOMUX_PIN_NUM_WP_OCT 38
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#define SPI2_IOMUX_PIN_NUM_IO4_OCT 10
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#define SPI2_IOMUX_PIN_NUM_IO5_OCT 11
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#define SPI2_IOMUX_PIN_NUM_IO6_OCT 12
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#define SPI2_IOMUX_PIN_NUM_IO7_OCT 13
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//SPI3 have no iomux pins
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