mirror of
https://github.com/espressif/esp-idf.git
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108 lines
4.0 KiB
C
108 lines
4.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <string.h>
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#include <stdarg.h>
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_regdma.h"
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#include "esp_private/startup_internal.h"
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#include "esp_private/sleep_retention.h"
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#include "esp_private/sleep_clock.h"
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#include "soc/pcr_reg.h"
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#include "modem/modem_syscon_reg.h"
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#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
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#include "modem/modem_lpcon_reg.h"
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#endif
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static __attribute__((unused)) const char *TAG = "sleep_clock";
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esp_err_t sleep_clock_system_retention_init(void)
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{
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#if CONFIG_IDF_TARGET_ESP32C6
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#define N_REGS_PCR() (((PCR_SRAM_POWER_CONF_REG - DR_REG_PCR_BASE) / 4) + 1)
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#elif CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5
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#define N_REGS_PCR() (((PCR_PWDET_SAR_CLK_CONF_REG - DR_REG_PCR_BASE) / 4) + 1)
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#endif
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const static sleep_retention_entries_config_t pcr_regs_retention[] = {
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[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_PCR_LINK(0), DR_REG_PCR_BASE, DR_REG_PCR_BASE, N_REGS_PCR(), 0, 0), .owner = ENTRY(0) | ENTRY(2) } /* pcr */
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};
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esp_err_t err = sleep_retention_entries_create(pcr_regs_retention, ARRAY_SIZE(pcr_regs_retention), REGDMA_LINK_PRI_SYS_CLK, SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for system (PCR) retention");
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ESP_LOGI(TAG, "System Power, Clock and Reset sleep retention initialization");
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return ESP_OK;
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}
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void sleep_clock_system_retention_deinit(void)
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{
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sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
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}
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esp_err_t sleep_clock_modem_retention_init(void)
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{
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#if CONFIG_IDF_TARGET_ESP32C5
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_RF2_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#else
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#define N_REGS_SYSCON() (((MODEM_SYSCON_MEM_CONF_REG - MODEM_SYSCON_TEST_CONF_REG) / 4) + 1)
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#endif
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#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
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#define N_REGS_LPCON() (((MODEM_LPCON_MEM_CONF_REG - MODEM_LPCON_TEST_CONF_REG) / 4) + 1)
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#endif
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const static sleep_retention_entries_config_t modem_regs_retention[] = {
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[0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMSYSCON_LINK(0), MODEM_SYSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) }, /* MODEM SYSCON */
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#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
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[1] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEMLPCON_LINK(0), MODEM_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY(1) } /* MODEM LPCON */
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#endif
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};
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esp_err_t err = sleep_retention_entries_create(modem_regs_retention, ARRAY_SIZE(modem_regs_retention), REGDMA_LINK_PRI_MODEM_CLK, SLEEP_RETENTION_MODULE_CLOCK_MODEM);
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ESP_RETURN_ON_ERROR(err, TAG, "failed to allocate memory for modem (SYSCON) retention, 2 level priority");
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ESP_LOGI(TAG, "Modem Power, Clock and Reset sleep retention initialization");
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return ESP_OK;
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}
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void sleep_clock_modem_retention_deinit(void)
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{
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sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
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}
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bool clock_domain_pd_allowed(void)
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{
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const uint32_t modules = sleep_retention_get_modules();
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const uint32_t mask = (const uint32_t) (
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SLEEP_RETENTION_MODULE_CLOCK_SYSTEM
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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| SLEEP_RETENTION_MODULE_CLOCK_MODEM
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#endif
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);
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return ((modules & mask) == mask);
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}
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP || CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
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{
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#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
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sleep_clock_system_retention_init();
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#endif
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#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
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sleep_clock_modem_retention_init();
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#endif
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return ESP_OK;
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}
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#endif
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