mirror of
https://github.com/espressif/esp-idf.git
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114 lines
2.9 KiB
C
114 lines
2.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_err.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef unsigned (*bootloader_flash_read_status_fn_t)(void);
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typedef void (*bootloader_flash_write_status_fn_t)(unsigned);
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typedef struct __attribute__((packed))
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{
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const char *manufacturer;
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uint8_t mfg_id; /* 8-bit JEDEC manufacturer ID */
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uint16_t flash_id; /* 16-bit JEDEC flash chip ID */
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uint16_t id_mask; /* Bits to match on in flash chip ID */
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bootloader_flash_read_status_fn_t read_status_fn;
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bootloader_flash_write_status_fn_t write_status_fn;
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uint8_t status_qio_bit;
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} bootloader_qio_info_t;
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/**
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* @brief Read 8 bit status using RDSR command
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*
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* @return Value of SR1.
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*/
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unsigned bootloader_read_status_8b_rdsr(void);
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/**
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* @brief Read 8 bit status (second byte) using RDSR2 command
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*
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* @return Value of SR2
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*/
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unsigned bootloader_read_status_8b_rdsr2(void);
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/**
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* @brief Read 16 bit status using RDSR & RDSR2 (low and high bytes)
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*
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* @return Value of SR2#SR1.
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*/
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unsigned bootloader_read_status_16b_rdsr_rdsr2(void);
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/**
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* @brief Write 8 bit status using WRSR
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*/
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void bootloader_write_status_8b_wrsr(unsigned new_status);
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/**
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* @brief Write 8 bit status (second byte) using WRSR2.
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*/
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void bootloader_write_status_8b_wrsr2(unsigned new_status);
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/**
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* @brief Write 16 bit status using WRSR, (both write SR1 and SR2)
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*/
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void bootloader_write_status_16b_wrsr(unsigned new_status);
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/**
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* @brief Read 8 bit status of XM25QU64A.
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*
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* @return Value of 8 bit SR.
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*/
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unsigned bootloader_read_status_8b_xmc25qu64a(void);
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/**
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* @brief Write 8 bit status for XM25QU64A
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*/
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void bootloader_write_status_8b_xmc25qu64a(unsigned new_status);
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/* Array of known flash chips and data to enable Quad I/O mode
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Manufacturer & flash ID can be tested by running "esptool.py
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flash_id"
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If manufacturer ID matches, and flash ID ORed with flash ID mask
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matches, enable_qio_mode() will execute "Read Cmd", test if bit
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number "QIE Bit" is set, and if not set it will call "Write Cmd"
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with this bit set.
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Searching of this table stops when the first match is found.
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*/
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extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_support_list[];
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/**
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* @brief Unlock Flash write protect.
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* Please do not call this function in SDK.
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*
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* @note This can be overridden because it's attribute weak.
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*/
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esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
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#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
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/**
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* @brief Enable 32bits address flash(larger than 16MB) can map to cache.
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*
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* @param flash_mode SPI flash working mode.
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*
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* @note This can be overridden because it's attribute weak.
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*/
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void __attribute__((weak)) bootloader_flash_32bits_address_map_enable(esp_rom_spiflash_read_mode_t flash_mode);
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#endif
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#ifdef __cplusplus
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}
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#endif
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