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https://github.com/espressif/esp-idf.git
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bfeecd2b56
- freertos: add deprecated definition for XT_CLOCK_FREQ - flash_ops: don't use XT_CLOCK_FREQ - unity: don't use XT_CLOCK_FREQ - hw_random: don't use XT_CLOCK_FREQ - core_dump: don't use XT_CLOCK_FREQ - app_trace: don't use XT_CLOCK_FREQ - xtensa_init: init xt_tick_divisor
57 lines
2.2 KiB
C
57 lines
2.2 KiB
C
// Copyright 2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "esp_attr.h"
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#include "esp_clk.h"
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#include "soc/wdev_reg.h"
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#include "freertos/FreeRTOSConfig.h"
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#include "xtensa/core-macros.h"
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uint32_t IRAM_ATTR esp_random(void)
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{
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/* The PRNG which implements WDEV_RANDOM register gets 2 bits
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* of extra entropy from a hardware randomness source every APB clock cycle
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* (provided WiFi or BT are enabled). To make sure entropy is not drained
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* faster than it is added, this function needs to wait for at least 16 APB
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* clock cycles after reading previous word. This implementation may actually
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* wait a bit longer due to extra time spent in arithmetic and branch statements.
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*
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* As a (probably unncessary) precaution to avoid returning the
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* RNG state as-is, the result is XORed with additional
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* WDEV_RND_REG reads while waiting.
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*/
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/* This code does not run in a critical section, so CPU frequency switch may
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* happens while this code runs (this will not happen in the current
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* implementation, but possible in the future). However if that happens,
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* the number of cycles spent on frequency switching will certainly be more
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* than the number of cycles we need to wait here.
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*/
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uint32_t cpu_to_apb_freq_ratio = esp_clk_cpu_freq() / esp_clk_apb_freq();
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static uint32_t last_ccount = 0;
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uint32_t ccount;
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uint32_t result = 0;
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do {
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ccount = XTHAL_GET_CCOUNT();
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result ^= REG_READ(WDEV_RND_REG);
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} while (ccount - last_ccount < cpu_to_apb_freq_ratio * 16);
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last_ccount = ccount;
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return result ^ REG_READ(WDEV_RND_REG);
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}
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