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647dea9395
During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <stdlib.h>
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#include "sdkconfig.h"
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#include "esp_err.h"
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#include "hal/cpu_hal.h"
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#include "hal/cpu_types.h"
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#include "soc/soc_caps.h"
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#if SOC_CPU_BREAKPOINTS_NUM > 0
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void cpu_hal_set_breakpoint(int id, const void* addr)
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{
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cpu_ll_set_breakpoint(id, cpu_ll_ptr_to_pc(addr));
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}
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void cpu_hal_clear_breakpoint(int id)
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{
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cpu_ll_clear_breakpoint(id);
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}
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#endif // SOC_CPU_BREAKPOINTS_NUM > 0
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#if SOC_CPU_WATCHPOINTS_NUM > 0
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void cpu_hal_set_watchpoint(int id, const void* addr, size_t size, watchpoint_trigger_t trigger)
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{
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bool on_read = false, on_write = false;
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if (trigger == WATCHPOINT_TRIGGER_ON_RO) {
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on_read = true;
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} else if (trigger == WATCHPOINT_TRIGGER_ON_WO) {
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on_write = true;
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} else {
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on_read = on_write = true;
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}
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cpu_ll_set_watchpoint(id, addr, size, on_read, on_write);
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}
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void cpu_hal_clear_watchpoint(int id)
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{
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cpu_ll_clear_watchpoint(id);
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}
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#endif // SOC_CPU_WATCHPOINTS_NUM > 0
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void cpu_hal_set_vecbase(const void* base)
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{
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cpu_ll_set_vecbase(base);
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} |