Gustavo Henrique Nihei 24484887a9 esp_system: Ensure TIMG0 clock is always enabled during normal operation ... If the TimerGroup 0 clock is disabled and then reenabled, the watchdog registers (Flashboot protection included) will be re-enabled, and some seconds later, will trigger an unintended reset. Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>		2023-03-07 10:02:06 +08:00
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arch	WDT: implement interrupt wdt and task wdt for ESP32-C2	2022-12-01 10:45:35 +00:00
include	rtc_clk: Clean up some clock related enum and macro in soc/rtc.h, replace with new ones in	2022-05-24 22:59:41 +08:00
soc	esp_system: Ensure TIMG0 clock is always enabled during normal operation	2023-03-07 10:02:06 +08:00
brownout.c	system: fix brownout ISR triggering assert on single-core configs.	2022-08-01 16:18:30 +08:00
CMakeLists.txt	move brownout trax cache_int_err to private folder	2021-11-26 18:27:53 +08:00
cpu_start.c	system: moved placement of disable rom log efuse in startup flow	2022-08-01 11:16:17 +08:00
panic_handler.c	Task WDT: Interuptee task stack is now used for backtracing, regardless of the CPU core	2022-08-02 12:41:14 +08:00