alex/esp-idf
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esp-idf/components/wear_levelling/test
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Angus Gratton 420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
..
CMakeLists.txt Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
component.mk ut: Move tests back from "esp32" subfolder 2020-01-06 17:13:53 +08:00
test_partition_v1.bin Added test for version update from V1 to V2. Problems for tests on host are fixed. Random function changed to esp_random() 2018-07-31 08:45:42 +03:00
test_wl.c Updates for riscv support 2020-11-13 07:49:11 +11:00