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c36dd7834f
RISC-V stack pointer should always be 16 byte aligned, but for some cases where we were doing manual SP manipulation this was not always the case.
45 lines
1.3 KiB
ArmAsm
45 lines
1.3 KiB
ArmAsm
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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.section .text
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.global esp_shared_stack_invoke_function
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.type esp_shared_stack_invoke_function, @function
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esp_shared_stack_invoke_function:
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/* save current stack and return address */
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mv t0, sp
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mv t1, ra
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/* Set shared stack as new stack pointer */
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mv sp, a1
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/* store the ra and previous stack pointer in a safe place
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stack pointer for riscv should always be 16 byte aligned */
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addi sp,sp,-16
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sw t0, 0(sp)
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sw t1, 4(sp)
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/* call the subroutine */
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jalr a0, 0
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/* gets the ra and stack pointer saved previously */
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lw t0, 0(sp)
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lw t1, 4(sp)
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addi sp, sp, 16
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/* restore both ra and real stack pointer of current task */
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mv ra, t1
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mv sp, t0
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ret
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