esp-idf/components/esp32s2/Kconfig
Armando (Dou Yiwen) ad747b237a Merge branch 'toos/add_s3_ut_based_on_quad_octal_psram' into 'master'
ci: add s3 ut based on quad octal psram

See merge request espressif/esp-idf!18087
2022-05-16 09:57:21 +08:00

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menu "ESP32S2-specific"
# TODO: this component simply shouldn't be included
# in the build at the CMake level, but this is currently
# not working so we just hide all items here
visible if IDF_TARGET_ESP32S2
menu "Cache config"
choice ESP32S2_INSTRUCTION_CACHE_SIZE
prompt "Instruction cache size"
default ESP32S2_INSTRUCTION_CACHE_8KB
help
Instruction cache size to be set on application startup.
If you use 8KB instruction cache rather than 16KB instruction cache,
then the other 8KB will be added to the heap.
config ESP32S2_INSTRUCTION_CACHE_8KB
bool "8KB"
config ESP32S2_INSTRUCTION_CACHE_16KB
bool "16KB"
endchoice
choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
prompt "Instruction cache line size"
default ESP32S2_INSTRUCTION_CACHE_LINE_32B
help
Instruction cache line size to be set on application startup.
config ESP32S2_INSTRUCTION_CACHE_LINE_16B
bool "16 Bytes"
config ESP32S2_INSTRUCTION_CACHE_LINE_32B
bool "32 Bytes"
endchoice
choice ESP32S2_DATA_CACHE_SIZE
prompt "Data cache size"
default ESP32S2_DATA_CACHE_0KB if !ESP32S2_SPIRAM_SUPPORT
default ESP32S2_DATA_CACHE_8KB if ESP32S2_SPIRAM_SUPPORT
help
Data cache size to be set on application startup.
If you use 0KB data cache, the other 16KB will be added to the heap
If you use 8KB data cache rather than 16KB data cache, the other 8KB will be added to the heap
config ESP32S2_DATA_CACHE_0KB
depends on !ESP32S2_SPIRAM_SUPPORT
bool "0KB"
config ESP32S2_DATA_CACHE_8KB
bool "8KB"
config ESP32S2_DATA_CACHE_16KB
bool "16KB"
endchoice
choice ESP32S2_DATA_CACHE_LINE_SIZE
prompt "Data cache line size"
default ESP32S2_DATA_CACHE_LINE_32B
help
Data cache line size to be set on application startup.
config ESP32S2_DATA_CACHE_LINE_16B
bool "16 Bytes"
config ESP32S2_DATA_CACHE_LINE_32B
bool "32 Bytes"
endchoice
config ESP32S2_INSTRUCTION_CACHE_WRAP
bool "Enable instruction cache wrap"
default "n"
help
If enabled, instruction cache will use wrap mode to read spi flash (maybe spiram).
The wrap length equals to INSTRUCTION_CACHE_LINE_SIZE.
However, it depends on complex conditions.
config ESP32S2_DATA_CACHE_WRAP
bool "Enable data cache wrap"
default "n"
help
If enabled, data cache will use wrap mode to read spiram (maybe spi flash).
The wrap length equals to DATA_CACHE_LINE_SIZE.
However, it depends on complex conditions.
endmenu # Cache config
# Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
# instead
config ESP32S2_SPIRAM_SUPPORT
bool "Support for external, SPI-connected RAM"
default "n"
select SPIRAM
help
This enables support for an external SPI RAM chip, connected in parallel with the
main SPI flash chip.
menu "SPI RAM config"
depends on ESP32S2_SPIRAM_SUPPORT
config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
bool
default "y"
config SPIRAM_MODE_QUAD
bool
default "y"
choice SPIRAM_TYPE
prompt "Type of SPI RAM chip in use"
default SPIRAM_TYPE_AUTO
config SPIRAM_TYPE_AUTO
bool "Auto-detect"
config SPIRAM_TYPE_ESPPSRAM16
bool "ESP-PSRAM16 or APS1604"
config SPIRAM_TYPE_ESPPSRAM32
bool "ESP-PSRAM32"
config SPIRAM_TYPE_ESPPSRAM64
bool "ESP-PSRAM64 or LY68L6400"
endchoice
config SPIRAM_SIZE
int
default -1 if SPIRAM_TYPE_AUTO
default 2097152 if SPIRAM_TYPE_ESPPSRAM16
default 4194304 if SPIRAM_TYPE_ESPPSRAM32
default 8388608 if SPIRAM_TYPE_ESPPSRAM64
default 0
menu "PSRAM clock and cs IO for ESP32S2"
depends on ESP32S2_SPIRAM_SUPPORT
config DEFAULT_PSRAM_CLK_IO
int "PSRAM CLK IO number"
range 0 33
default 30
help
The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design.
config DEFAULT_PSRAM_CS_IO
int "PSRAM CS IO number"
range 0 33
default 26
help
The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
endmenu
config SPIRAM_FETCH_INSTRUCTIONS
bool "Cache fetch instructions from SPI RAM"
default n
help
If enabled, instruction in flash will be copied into SPIRAM.
If SPIRAM_RODATA also enabled,
you can run the instruction when erasing or programming the flash.
config SPIRAM_RODATA
bool "Cache load read only data from SPI RAM"
default n
help
If enabled, radata in flash will be copied into SPIRAM.
If SPIRAM_FETCH_INSTRUCTIONS also enabled,
you can run the instruction when erasing or programming the flash.
choice SPIRAM_SPEED
prompt "Set RAM clock speed"
default SPIRAM_SPEED_40M
help
Select the speed for the SPI RAM chip.
config SPIRAM_SPEED_80M
bool "80MHz clock speed"
config SPIRAM_SPEED_40M
bool "40Mhz clock speed"
config SPIRAM_SPEED_26M
bool "26Mhz clock speed"
config SPIRAM_SPEED_20M
bool "20Mhz clock speed"
endchoice
config SPIRAM_SPEED
int
default 80 if SPIRAM_SPEED_80M
default 40 if SPIRAM_SPEED_40M
default 40 if SPIRAM_SPEED_26M
default 40 if SPIRAM_SPEED_20M
source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" #insert non-chip-specific items here
endmenu
config ESP32S2_MEMMAP_TRACEMEM
bool
default "n"
config ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
bool
default "n"
config ESP32S2_TRAX
bool "Use TRAX tracing feature"
default "n"
select ESP32S2_MEMMAP_TRACEMEM
help
The ESP32S2 contains a feature which allows you to trace the execution path the processor
has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
of memory that can't be used for general purposes anymore. Disable this if you do not know
what this is.
config ESP32S2_TRACEMEM_RESERVE_DRAM
hex
default 0x8000 if ESP32S2_MEMMAP_TRACEMEM && ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
default 0x4000 if ESP32S2_MEMMAP_TRACEMEM && !ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
default 0x0
config ESP32S2_KEEP_USB_ALIVE
bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC
default y if ESP_CONSOLE_USB_CDC
help
During the application initialization process, all the peripherals except UARTs and timers
are reset. Enable this option to keep USB peripheral enabled.
This option is automatically enabled if "USB CDC" console is selected.
config ESP32S2_RTCDATA_IN_FAST_MEM
bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
default n
help
This option allows to place .rtc_data and .rtc_rodata sections into
RTC fast memory segment to free the slow memory region for ULP programs.
config ESP32S2_USE_FIXED_STATIC_RAM_SIZE
bool "Use fixed static RAM size"
default n
help
If this option is disabled, the DRAM part of the heap starts right after the .bss section,
within the dram0_0 region. As a result, adding or removing some static variables
will change the available heap size.
If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
where its length is set with ESP32S2_FIXED_STATIC_RAM_SIZE
config ESP32S2_FIXED_STATIC_RAM_SIZE
hex "Fixed Static RAM size"
default 0x10000
range 0 0x34000
depends on ESP32S2_USE_FIXED_STATIC_RAM_SIZE
help
RAM size dedicated for static variables (.data & .bss sections).
endmenu # ESP32S2-Specific