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ad747b237a
ci: add s3 ut based on quad octal psram See merge request espressif/esp-idf!18087
247 lines
8.9 KiB
Plaintext
247 lines
8.9 KiB
Plaintext
menu "ESP32S2-specific"
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# TODO: this component simply shouldn't be included
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# in the build at the CMake level, but this is currently
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# not working so we just hide all items here
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visible if IDF_TARGET_ESP32S2
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menu "Cache config"
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choice ESP32S2_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S2_INSTRUCTION_CACHE_8KB
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help
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Instruction cache size to be set on application startup.
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If you use 8KB instruction cache rather than 16KB instruction cache,
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then the other 8KB will be added to the heap.
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config ESP32S2_INSTRUCTION_CACHE_8KB
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bool "8KB"
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config ESP32S2_INSTRUCTION_CACHE_16KB
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bool "16KB"
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endchoice
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choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S2_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S2_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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config ESP32S2_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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choice ESP32S2_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S2_DATA_CACHE_0KB if !ESP32S2_SPIRAM_SUPPORT
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default ESP32S2_DATA_CACHE_8KB if ESP32S2_SPIRAM_SUPPORT
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help
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Data cache size to be set on application startup.
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If you use 0KB data cache, the other 16KB will be added to the heap
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If you use 8KB data cache rather than 16KB data cache, the other 8KB will be added to the heap
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config ESP32S2_DATA_CACHE_0KB
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depends on !ESP32S2_SPIRAM_SUPPORT
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bool "0KB"
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config ESP32S2_DATA_CACHE_8KB
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bool "8KB"
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config ESP32S2_DATA_CACHE_16KB
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bool "16KB"
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endchoice
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choice ESP32S2_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S2_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S2_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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config ESP32S2_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S2_INSTRUCTION_CACHE_WRAP
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bool "Enable instruction cache wrap"
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default "n"
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help
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If enabled, instruction cache will use wrap mode to read spi flash (maybe spiram).
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The wrap length equals to INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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config ESP32S2_DATA_CACHE_WRAP
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bool "Enable data cache wrap"
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default "n"
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help
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If enabled, data cache will use wrap mode to read spiram (maybe spi flash).
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The wrap length equals to DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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endmenu # Cache config
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# Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
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# instead
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config ESP32S2_SPIRAM_SUPPORT
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bool "Support for external, SPI-connected RAM"
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default "n"
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select SPIRAM
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help
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This enables support for an external SPI RAM chip, connected in parallel with the
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main SPI flash chip.
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menu "SPI RAM config"
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depends on ESP32S2_SPIRAM_SUPPORT
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config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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bool
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default "y"
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config SPIRAM_MODE_QUAD
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bool
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default "y"
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choice SPIRAM_TYPE
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prompt "Type of SPI RAM chip in use"
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default SPIRAM_TYPE_AUTO
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config SPIRAM_TYPE_AUTO
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bool "Auto-detect"
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config SPIRAM_TYPE_ESPPSRAM16
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bool "ESP-PSRAM16 or APS1604"
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config SPIRAM_TYPE_ESPPSRAM32
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bool "ESP-PSRAM32"
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config SPIRAM_TYPE_ESPPSRAM64
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bool "ESP-PSRAM64 or LY68L6400"
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endchoice
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config SPIRAM_SIZE
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int
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default -1 if SPIRAM_TYPE_AUTO
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default 2097152 if SPIRAM_TYPE_ESPPSRAM16
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default 4194304 if SPIRAM_TYPE_ESPPSRAM32
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default 8388608 if SPIRAM_TYPE_ESPPSRAM64
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default 0
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menu "PSRAM clock and cs IO for ESP32S2"
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depends on ESP32S2_SPIRAM_SUPPORT
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config DEFAULT_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 30
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help
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The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design.
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config DEFAULT_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 26
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help
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The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
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endmenu
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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help
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If enabled, instruction in flash will be copied into SPIRAM.
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If SPIRAM_RODATA also enabled,
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you can run the instruction when erasing or programming the flash.
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config SPIRAM_RODATA
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bool "Cache load read only data from SPI RAM"
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default n
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help
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If enabled, radata in flash will be copied into SPIRAM.
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If SPIRAM_FETCH_INSTRUCTIONS also enabled,
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you can run the instruction when erasing or programming the flash.
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choice SPIRAM_SPEED
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prompt "Set RAM clock speed"
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default SPIRAM_SPEED_40M
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help
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Select the speed for the SPI RAM chip.
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config SPIRAM_SPEED_80M
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bool "80MHz clock speed"
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config SPIRAM_SPEED_40M
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bool "40Mhz clock speed"
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config SPIRAM_SPEED_26M
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bool "26Mhz clock speed"
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config SPIRAM_SPEED_20M
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bool "20Mhz clock speed"
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endchoice
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config SPIRAM_SPEED
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int
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default 80 if SPIRAM_SPEED_80M
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default 40 if SPIRAM_SPEED_40M
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default 40 if SPIRAM_SPEED_26M
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default 40 if SPIRAM_SPEED_20M
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source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" #insert non-chip-specific items here
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endmenu
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config ESP32S2_MEMMAP_TRACEMEM
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bool
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default "n"
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config ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
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bool
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default "n"
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config ESP32S2_TRAX
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bool "Use TRAX tracing feature"
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default "n"
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select ESP32S2_MEMMAP_TRACEMEM
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help
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The ESP32S2 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S2_TRACEMEM_RESERVE_DRAM
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hex
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default 0x8000 if ESP32S2_MEMMAP_TRACEMEM && ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
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default 0x4000 if ESP32S2_MEMMAP_TRACEMEM && !ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
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default 0x0
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config ESP32S2_KEEP_USB_ALIVE
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bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC
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default y if ESP_CONSOLE_USB_CDC
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help
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During the application initialization process, all the peripherals except UARTs and timers
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are reset. Enable this option to keep USB peripheral enabled.
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This option is automatically enabled if "USB CDC" console is selected.
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config ESP32S2_RTCDATA_IN_FAST_MEM
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bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
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default n
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help
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This option allows to place .rtc_data and .rtc_rodata sections into
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RTC fast memory segment to free the slow memory region for ULP programs.
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config ESP32S2_USE_FIXED_STATIC_RAM_SIZE
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bool "Use fixed static RAM size"
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default n
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help
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If this option is disabled, the DRAM part of the heap starts right after the .bss section,
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within the dram0_0 region. As a result, adding or removing some static variables
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will change the available heap size.
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If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
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where its length is set with ESP32S2_FIXED_STATIC_RAM_SIZE
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config ESP32S2_FIXED_STATIC_RAM_SIZE
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hex "Fixed Static RAM size"
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default 0x10000
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range 0 0x34000
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depends on ESP32S2_USE_FIXED_STATIC_RAM_SIZE
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help
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RAM size dedicated for static variables (.data & .bss sections).
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endmenu # ESP32S2-Specific
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