mirror of
https://github.com/espressif/esp-idf.git
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8ac74082f1
The CPU might prefetch instructions, which means it in some cases will try to fetch instruction located after the last instruction in flash.text. Add dummy bytes to ensure fetching these wont result in an error, e.g. MMU exceptions
197 lines
6.1 KiB
Plaintext
197 lines
6.1 KiB
Plaintext
/** Simplified memory map for the bootloader.
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* Make sure the bootloader can load into main memory without overwriting itself.
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* We put 2nd bootloader in the high address space (before ROM stack/data/bss).
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* See memory usage for ROM bootloader at the end of this file.
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*/
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MEMORY
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{
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iram_seg (RWX) : org = 0x403B6000, len = 0x4000
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iram_loader_seg (RWX) : org = 0x403BA000, len = 0x6000
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dram_seg (RW) : org = 0x3FCD0000, len = 0x4000
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}
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/* Default entry point: */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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.iram_loader.text :
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{
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. = ALIGN (16);
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_loader_text_start = ABSOLUTE(.);
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
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*liblog.a:(.literal .text .literal.* .text.*)
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*libgcc.a:(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
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*libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
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*libbootloader_support.a:bootloader_efuse_esp32s3.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
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*libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
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*libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
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*libspi_flash.a:*.*(.literal .text .literal.* .text.*)
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*libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
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*libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
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*libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
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*libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
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*libefuse.a:*.*(.literal .text .literal.* .text.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_loader_text_end = ABSOLUTE(.);
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} > iram_loader_seg
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.iram.text :
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{
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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} > iram_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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. = ALIGN (8);
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_dram_start = ABSOLUTE(.);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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} > dram_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} > dram_seg
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.dram0.rodata :
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ constructor and destructor tables, properly ordered: */
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__init_array_start = ABSOLUTE(.);
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KEEP (*crtbegin.*(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.*(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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_dram_end = ABSOLUTE(.);
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} > dram_seg
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.iram.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.iram .iram.*) /* catch stray IRAM_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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/** CPU will try to prefetch up to 16 bytes of
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* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_text_end = ABSOLUTE(.);
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_etext = .;
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} > iram_seg
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}
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/**
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* Appendix: Memory Usage of ROM bootloader
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*
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* +--------+--------------+------+ 0x3FCD_8000
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* | ^ |
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* | | |
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* | | data/bss |
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* | | |
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* | v |
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* +------------------------------+ 0x3FCE_9910
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* | ^ |
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* | | |
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* | | stack (pro) |
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* | | |
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* | v |
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* +------------------------------+ 0x3FCE_B910
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* | ^ |
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* | | |
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* | | stack (app) |
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* | | |
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* | v |
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* +--------+--------------+------+ 0x3FCE_D910
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*/
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