mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
477 lines
16 KiB
C
477 lines
16 KiB
C
/*
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* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef volatile struct syscon_dev_s{
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union {
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struct {
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uint32_t pre_div : 10; /*reg_pre_div_cnt*/
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uint32_t clk_320m_en : 1; /*reg_clk_320m_en*/
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uint32_t clk_en : 1; /*reg_clk_en*/
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uint32_t rst_tick : 1; /*reg_rst_tick_cnt*/
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uint32_t reserved13 : 19; /*Reserved.*/
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};
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uint32_t val;
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} clk_conf;
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union {
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struct {
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uint32_t xtal_tick : 8; /*reg_xtal_tick_num*/
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uint32_t ck8m_tick : 8; /*reg_ck8m_tick_num*/
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uint32_t tick_enable : 1; /*reg_tick_enable*/
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uint32_t reserved17 : 15; /*Reserved.*/
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};
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uint32_t val;
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} tick_conf;
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union {
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struct {
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uint32_t clk20_oen : 1; /*reg_clk20_oen*/
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uint32_t clk22_oen : 1; /*reg_clk22_oen*/
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uint32_t clk44_oen : 1; /*reg_clk44_oen*/
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uint32_t clk_bb_oen : 1; /*reg_clk_bb_oen*/
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uint32_t clk80_oen : 1; /*reg_clk80_oen*/
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uint32_t clk160_oen : 1; /*reg_clk160_oen*/
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uint32_t clk_320m_oen : 1; /*reg_clk_320m_oen*/
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uint32_t clk_adc_inf_oen : 1; /*reg_clk_adc_inf_oen*/
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uint32_t clk_dac_cpu_oen : 1; /*reg_clk_dac_cpu_oen*/
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uint32_t clk40x_bb_oen : 1; /*reg_clk40x_bb_oen*/
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uint32_t clk_xtal_oen : 1; /*reg_clk_xtal_oen*/
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uint32_t reserved11 : 21; /*Reserved.*/
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};
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uint32_t val;
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} clk_out_en;
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uint32_t wifi_bb_cfg;
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uint32_t wifi_bb_cfg_2;
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uint32_t wifi_clk_en;
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uint32_t wifi_rst_en;
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union {
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struct {
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uint32_t peri_io_swap : 8; /*reg_peri_io_swap*/
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uint32_t reserved8 : 24; /*Reserved.*/
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};
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uint32_t val;
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} host_inf_sel;
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union {
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struct {
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uint32_t ext_mem_pms_lock : 1; /*reg_ext_mem_pms_lock*/
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uint32_t reserved1 : 31; /*Reserved.*/
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};
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uint32_t val;
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} ext_mem_pms_lock;
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uint32_t reserved_24;
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union {
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struct {
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uint32_t flash_ace0_attr : 2; /*reg_flash_ace0_attr*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace0_attr;
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union {
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struct {
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uint32_t flash_ace1_attr : 2; /*reg_flash_ace1_attr*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace1_attr;
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union {
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struct {
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uint32_t flash_ace2_attr : 2; /*reg_flash_ace2_attr*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace2_attr;
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union {
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struct {
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uint32_t flash_ace3_attr : 2; /*reg_flash_ace3_attr*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace3_attr;
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uint32_t flash_ace0_addr;
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uint32_t flash_ace1_addr;
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uint32_t flash_ace2_addr;
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uint32_t flash_ace3_addr;
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union {
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struct {
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uint32_t flash_ace0_size : 13; /*reg_flash_ace0_size*/
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uint32_t reserved13 : 19; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace0_size;
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union {
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struct {
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uint32_t flash_ace1_size : 13; /*reg_flash_ace1_size*/
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uint32_t reserved13 : 19; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace1_size;
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union {
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struct {
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uint32_t flash_ace2_size : 13; /*reg_flash_ace2_size*/
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uint32_t reserved13 : 19; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace2_size;
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union {
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struct {
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uint32_t flash_ace3_size : 13; /*reg_flash_ace3_size*/
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uint32_t reserved13 : 19; /*Reserved.*/
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};
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uint32_t val;
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} flash_ace3_size;
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uint32_t reserved_58;
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uint32_t reserved_5c;
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uint32_t reserved_60;
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uint32_t reserved_64;
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uint32_t reserved_68;
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uint32_t reserved_6c;
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uint32_t reserved_70;
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uint32_t reserved_74;
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uint32_t reserved_78;
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uint32_t reserved_7c;
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uint32_t reserved_80;
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uint32_t reserved_84;
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union {
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struct {
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uint32_t spi_mem_reject_int : 1; /*reg_spi_mem_reject_int*/
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uint32_t spi_mem_reject_clr : 1; /*reg_spi_mem_reject_clr*/
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uint32_t spi_mem_reject_cde : 5; /*reg_spi_mem_reject_cde*/
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uint32_t reserved7 : 25; /*Reserved.*/
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};
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uint32_t val;
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} spi_mem_pms_ctrl;
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uint32_t spi_mem_reject_addr;
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union {
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struct {
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uint32_t sdio_win_access_en : 1; /*reg_sdio_win_access_en*/
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uint32_t reserved1 : 31; /*Reserved.*/
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};
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uint32_t val;
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} sdio_ctrl;
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union {
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struct {
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uint32_t redcy_sig0 : 31; /*reg_redcy_sig0*/
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uint32_t redcy_andor : 1; /*reg_redcy_andor*/
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};
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uint32_t val;
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} redcy_sig0;
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union {
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struct {
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uint32_t redcy_sig1 : 31; /*reg_redcy_sig1*/
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uint32_t redcy_nandor : 1; /*reg_redcy_nandor*/
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};
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uint32_t val;
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} redcy_sig1;
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union {
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struct {
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uint32_t agc_mem_force_pu : 1; /*reg_agc_mem_force_pu*/
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uint32_t agc_mem_force_pd : 1; /*reg_agc_mem_force_pd*/
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uint32_t pbus_mem_force_pu : 1; /*reg_pbus_mem_force_pu*/
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uint32_t pbus_mem_force_pd : 1; /*reg_pbus_mem_force_pd*/
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uint32_t dc_mem_force_pu : 1; /*reg_dc_mem_force_pu*/
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uint32_t dc_mem_force_pd : 1; /*reg_dc_mem_force_pd*/
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uint32_t freq_mem_force_pu : 1; /*reg_freq_mem_force_pu*/
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uint32_t freq_mem_force_pd : 1; /*reg_freq_mem_force_pd*/
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uint32_t reserved8 : 24; /*Reserved.*/
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};
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uint32_t val;
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} front_end_mem_pd;
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union {
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struct {
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uint32_t retention_link_addr : 27; /*reg_retention_link_addr*/
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uint32_t nobypass_cpu_iso_rst : 1; /*reg_nobypass_cpu_iso_rst*/
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uint32_t reserved28 : 4; /*Reserved.*/
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};
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uint32_t val;
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} retention_ctrl;
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union {
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struct {
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uint32_t rom_clkgate_force_on : 3; /*Set the bit to 1 to force rom always have clock, for low power can clear to 0 then only when have access the rom have clock*/
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uint32_t sram_clkgate_force_on : 4; /*Set the bit to 1 to force sram always have clock, for low power can clear to 0 then only when have access the sram have clock*/
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uint32_t reserved7 : 25; /*Reserved.*/
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};
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uint32_t val;
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} clkgate_force_on;
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union {
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struct {
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uint32_t rom_power_down : 3; /*Set 1 to let rom power down*/
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uint32_t sram_power_down : 4; /*Set 1 to let sram power down*/
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uint32_t reserved7 : 25; /*Reserved.*/
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};
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uint32_t val;
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} mem_power_down;
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union {
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struct {
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uint32_t rom_power_up : 3; /*Set 1 to let rom power up*/
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uint32_t sram_power_up : 4; /*Set 1 to let sram power up*/
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uint32_t reserved7 : 25; /*Reserved.*/
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};
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uint32_t val;
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} mem_power_up;
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uint32_t rnd_data;
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union {
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struct {
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uint32_t reserved0 : 1; /*Reserved.*/
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uint32_t peri_backup_flow_err : 2; /*reg_peri_backup_flow_err*/
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uint32_t reserved3 : 1; /*Reserved.*/
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uint32_t peri_backup_burst_limit : 5; /*reg_peri_backup_burst_limit*/
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uint32_t peri_backup_tout_thres : 10; /*reg_peri_backup_tout_thres*/
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uint32_t peri_backup_size : 10; /*reg_peri_backup_size*/
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uint32_t peri_backup_start : 1; /*reg_peri_backup_start*/
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uint32_t peri_backup_to_mem : 1; /*reg_peri_backup_to_mem*/
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uint32_t peri_backup_ena : 1; /*reg_peri_backup_ena*/
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};
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uint32_t val;
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} peri_backup_config;
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uint32_t peri_backup_addr;
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uint32_t peri_backup_mem_addr;
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union {
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struct {
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uint32_t peri_backup_done : 1; /*reg_peri_backup_done_int_raw*/
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uint32_t peri_backup_err : 1; /*reg_peri_backup_err_int_raw*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} peri_backup_int_raw;
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union {
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struct {
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uint32_t peri_backup_done : 1; /*reg_peri_backup_done_int_st*/
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uint32_t peri_backup_err : 1; /*reg_peri_backup_err_int_st*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} peri_backup_int_st;
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union {
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struct {
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uint32_t peri_backup_done : 1; /*reg_peri_backup_done_int_ena*/
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uint32_t peri_backup_err : 1; /*reg_peri_backup_err_int_ena*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} peri_backup_int_ena;
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uint32_t reserved_cc;
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union {
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struct {
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uint32_t peri_backup_done : 1; /*reg_peri_backup_done_int_clr*/
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uint32_t peri_backup_err : 1; /*reg_peri_backup_err_int_clr*/
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uint32_t reserved2 : 30; /*Reserved.*/
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};
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uint32_t val;
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} peri_backup_int_clr;
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uint32_t reserved_d4;
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uint32_t reserved_d8;
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uint32_t reserved_dc;
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uint32_t reserved_e0;
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uint32_t reserved_e4;
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uint32_t reserved_e8;
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uint32_t reserved_ec;
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uint32_t reserved_f0;
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uint32_t reserved_f4;
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uint32_t reserved_f8;
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uint32_t reserved_fc;
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uint32_t reserved_100;
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uint32_t reserved_104;
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uint32_t reserved_108;
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uint32_t reserved_10c;
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uint32_t reserved_110;
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uint32_t reserved_114;
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uint32_t reserved_118;
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uint32_t reserved_11c;
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uint32_t reserved_120;
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uint32_t reserved_124;
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uint32_t reserved_128;
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uint32_t reserved_12c;
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uint32_t reserved_130;
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uint32_t reserved_134;
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uint32_t reserved_138;
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uint32_t reserved_13c;
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uint32_t reserved_140;
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uint32_t reserved_144;
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uint32_t reserved_148;
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uint32_t reserved_14c;
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uint32_t reserved_150;
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uint32_t reserved_154;
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uint32_t reserved_158;
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uint32_t reserved_15c;
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uint32_t reserved_160;
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uint32_t reserved_164;
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uint32_t reserved_168;
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uint32_t reserved_16c;
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uint32_t reserved_170;
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uint32_t reserved_174;
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uint32_t reserved_178;
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uint32_t reserved_17c;
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uint32_t reserved_180;
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uint32_t reserved_184;
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uint32_t reserved_188;
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uint32_t reserved_18c;
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uint32_t reserved_190;
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uint32_t reserved_194;
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uint32_t reserved_198;
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uint32_t reserved_19c;
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uint32_t reserved_1a0;
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uint32_t reserved_1a4;
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uint32_t reserved_1a8;
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uint32_t reserved_1ac;
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uint32_t reserved_1b0;
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uint32_t reserved_1b4;
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uint32_t reserved_1b8;
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uint32_t reserved_1bc;
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uint32_t reserved_1c0;
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uint32_t reserved_1c4;
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uint32_t reserved_1c8;
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uint32_t reserved_1cc;
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uint32_t reserved_1d0;
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uint32_t reserved_1d4;
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uint32_t reserved_1d8;
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uint32_t reserved_1dc;
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uint32_t reserved_1e0;
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uint32_t reserved_1e4;
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uint32_t reserved_1e8;
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uint32_t reserved_1ec;
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uint32_t reserved_1f0;
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uint32_t reserved_1f4;
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uint32_t reserved_1f8;
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uint32_t reserved_1fc;
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uint32_t reserved_200;
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uint32_t reserved_204;
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uint32_t reserved_208;
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uint32_t reserved_20c;
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uint32_t reserved_210;
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uint32_t reserved_214;
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uint32_t reserved_218;
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uint32_t reserved_21c;
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uint32_t reserved_220;
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uint32_t reserved_224;
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uint32_t reserved_228;
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uint32_t reserved_22c;
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uint32_t reserved_230;
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uint32_t reserved_234;
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uint32_t reserved_238;
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uint32_t reserved_23c;
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uint32_t reserved_240;
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uint32_t reserved_244;
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uint32_t reserved_248;
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uint32_t reserved_24c;
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uint32_t reserved_250;
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uint32_t reserved_254;
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uint32_t reserved_258;
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uint32_t reserved_25c;
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uint32_t reserved_260;
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uint32_t reserved_264;
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uint32_t reserved_268;
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uint32_t reserved_26c;
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uint32_t reserved_270;
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uint32_t reserved_274;
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uint32_t reserved_278;
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uint32_t reserved_27c;
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uint32_t reserved_280;
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uint32_t reserved_284;
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uint32_t reserved_288;
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uint32_t reserved_28c;
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uint32_t reserved_290;
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uint32_t reserved_294;
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uint32_t reserved_298;
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uint32_t reserved_29c;
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uint32_t reserved_2a0;
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uint32_t reserved_2a4;
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uint32_t reserved_2a8;
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uint32_t reserved_2ac;
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uint32_t reserved_2b0;
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uint32_t reserved_2b4;
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uint32_t reserved_2b8;
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uint32_t reserved_2bc;
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uint32_t reserved_2c0;
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uint32_t reserved_2c4;
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uint32_t reserved_2c8;
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uint32_t reserved_2cc;
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uint32_t reserved_2d0;
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uint32_t reserved_2d4;
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uint32_t reserved_2d8;
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uint32_t reserved_2dc;
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uint32_t reserved_2e0;
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uint32_t reserved_2e4;
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uint32_t reserved_2e8;
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uint32_t reserved_2ec;
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uint32_t reserved_2f0;
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uint32_t reserved_2f4;
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uint32_t reserved_2f8;
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uint32_t reserved_2fc;
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uint32_t reserved_300;
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uint32_t reserved_304;
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uint32_t reserved_308;
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uint32_t reserved_30c;
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uint32_t reserved_310;
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uint32_t reserved_314;
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uint32_t reserved_318;
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uint32_t reserved_31c;
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uint32_t reserved_320;
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uint32_t reserved_324;
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uint32_t reserved_328;
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uint32_t reserved_32c;
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uint32_t reserved_330;
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uint32_t reserved_334;
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uint32_t reserved_338;
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uint32_t reserved_33c;
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uint32_t reserved_340;
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uint32_t reserved_344;
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uint32_t reserved_348;
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uint32_t reserved_34c;
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uint32_t reserved_350;
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uint32_t reserved_354;
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uint32_t reserved_358;
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uint32_t reserved_35c;
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uint32_t reserved_360;
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uint32_t reserved_364;
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uint32_t reserved_368;
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uint32_t reserved_36c;
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uint32_t reserved_370;
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uint32_t reserved_374;
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uint32_t reserved_378;
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uint32_t reserved_37c;
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uint32_t reserved_380;
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uint32_t reserved_384;
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uint32_t reserved_388;
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uint32_t reserved_38c;
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uint32_t reserved_390;
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uint32_t reserved_394;
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uint32_t reserved_398;
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uint32_t reserved_39c;
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uint32_t reserved_3a0;
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uint32_t reserved_3a4;
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uint32_t reserved_3a8;
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uint32_t reserved_3ac;
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uint32_t reserved_3b0;
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uint32_t reserved_3b4;
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uint32_t reserved_3b8;
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uint32_t reserved_3bc;
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uint32_t reserved_3c0;
|
|
uint32_t reserved_3c4;
|
|
uint32_t reserved_3c8;
|
|
uint32_t reserved_3cc;
|
|
uint32_t reserved_3d0;
|
|
uint32_t reserved_3d4;
|
|
uint32_t reserved_3d8;
|
|
uint32_t reserved_3dc;
|
|
uint32_t reserved_3e0;
|
|
uint32_t reserved_3e4;
|
|
uint32_t reserved_3e8;
|
|
uint32_t reserved_3ec;
|
|
uint32_t reserved_3f0;
|
|
uint32_t reserved_3f4;
|
|
uint32_t reserved_3f8;
|
|
uint32_t date;
|
|
} syscon_dev_t;
|
|
extern syscon_dev_t SYSCON;
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|