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cd7b8f2db1
According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV. This commit fixes the bug. |
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.. | ||
cmake | ||
ld | ||
lp_core | ||
test_apps | ||
ulp_common | ||
ulp_fsm | ||
ulp_riscv | ||
.build-test-rules.yml | ||
CMakeLists.txt | ||
component_ulp_common.cmake | ||
esp32ulp_mapgen.py | ||
Kconfig | ||
project_include.cmake | ||
sdkconfig.rename.esp32 | ||
sdkconfig.rename.esp32s2 |