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https://github.com/espressif/esp-idf.git
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5ab755915b
Each MCPWM operator has two Trigger (named T0 and T1), and they can be routed to GPIO fault signal or timer sync event.Generator can be set up to perform different action on Trigger event. This commit add a trigger driver and a test for the driver.
240 lines
10 KiB
C
240 lines
10 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "freertos/FreeRTOS.h"
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "esp_heap_caps.h"
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#include "esp_pm.h"
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#include "soc/soc_caps.h"
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#include "hal/mcpwm_hal.h"
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#include "hal/mcpwm_types.h"
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#include "driver/mcpwm_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if CONFIG_MCPWM_ISR_IRAM_SAFE || CONFIG_MCPWM_CTRL_FUNC_IN_IRAM
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#define MCPWM_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#else
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#define MCPWM_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#endif
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#if CONFIG_MCPWM_ISR_IRAM_SAFE
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#define MCPWM_INTR_ALLOC_FLAG (ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_IRAM)
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#else
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#define MCPWM_INTR_ALLOC_FLAG (ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_INTRDISABLED)
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#endif
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#define MCPWM_PERIPH_CLOCK_PRE_SCALE (2)
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#define MCPWM_PM_LOCK_NAME_LEN_MAX 16
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typedef struct mcpwm_group_t mcpwm_group_t;
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typedef struct mcpwm_timer_t mcpwm_timer_t;
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typedef struct mcpwm_cap_timer_t mcpwm_cap_timer_t;
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typedef struct mcpwm_oper_t mcpwm_oper_t;
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typedef struct mcpwm_cmpr_t mcpwm_cmpr_t;
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typedef struct mcpwm_gen_t mcpwm_gen_t;
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typedef struct mcpwm_fault_t mcpwm_fault_t;
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typedef struct mcpwm_gpio_fault_t mcpwm_gpio_fault_t;
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typedef struct mcpwm_soft_fault_t mcpwm_soft_fault_t;
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typedef struct mcpwm_sync_t mcpwm_sync_t;
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typedef struct mcpwm_gpio_sync_src_t mcpwm_gpio_sync_src_t;
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typedef struct mcpwm_timer_sync_src_t mcpwm_timer_sync_src_t;
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typedef struct mcpwm_soft_sync_src_t mcpwm_soft_sync_src_t;
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typedef struct mcpwm_cap_channel_t mcpwm_cap_channel_t;
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struct mcpwm_group_t {
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int group_id; // group ID, index from 0
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mcpwm_hal_context_t hal; // HAL instance is at group level
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portMUX_TYPE spinlock; // group level spinlock
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uint32_t resolution_hz; // MCPWM group clock resolution
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esp_pm_lock_handle_t pm_lock; // power management lock
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soc_module_clk_t clk_src; // peripheral source clock
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mcpwm_cap_timer_t *cap_timer; // mcpwm capture timers
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mcpwm_timer_t *timers[SOC_MCPWM_TIMERS_PER_GROUP]; // mcpwm timer array
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mcpwm_oper_t *operators[SOC_MCPWM_OPERATORS_PER_GROUP]; // mcpwm operator array
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mcpwm_gpio_fault_t *gpio_faults[SOC_MCPWM_GPIO_FAULTS_PER_GROUP]; // mcpwm fault detectors array
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mcpwm_gpio_sync_src_t *gpio_sync_srcs[SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP]; // mcpwm gpio sync array
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#if CONFIG_PM_ENABLE
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char pm_lock_name[MCPWM_PM_LOCK_NAME_LEN_MAX]; // pm lock name
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#endif
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};
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typedef enum {
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MCPWM_TIMER_FSM_INIT,
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MCPWM_TIMER_FSM_ENABLE,
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} mcpwm_timer_fsm_t;
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struct mcpwm_timer_t {
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int timer_id; // timer ID, index from 0
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mcpwm_group_t *group; // which group the timer belongs to
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mcpwm_timer_fsm_t fsm; // driver FSM
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portMUX_TYPE spinlock; // spin lock
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intr_handle_t intr; // interrupt handle
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uint32_t resolution_hz; // resolution of the timer
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uint32_t peak_ticks; // peak ticks that the timer could reach to
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mcpwm_timer_sync_src_t *sync_src; // timer sync_src
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mcpwm_timer_count_mode_t count_mode; // count mode
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mcpwm_timer_event_cb_t on_full; // callback function when MCPWM timer counts to peak value
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mcpwm_timer_event_cb_t on_empty; // callback function when MCPWM timer counts to zero
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mcpwm_timer_event_cb_t on_stop; // callback function when MCPWM timer stops
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void *user_data; // user data which would be passed to the timer callbacks
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};
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typedef enum {
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MCPWM_TRIGGER_NO_ASSIGN, //default trigger source
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MCPWM_TRIGGER_GPIO_FAULT, //trigger assigned to gpio fault
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MCPWM_TRIGGER_SYNC_EVENT, //trigger assigned to sync event
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} mcpwm_trigger_source_t;
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struct mcpwm_oper_t {
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int oper_id; // operator ID, index from 0
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mcpwm_group_t *group; // which group the timer belongs to
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mcpwm_timer_t *timer; // which timer is connected to this operator
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portMUX_TYPE spinlock; // spin lock
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intr_handle_t intr; // interrupt handle
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mcpwm_gen_t *generators[SOC_MCPWM_GENERATORS_PER_OPERATOR]; // mcpwm generator array
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mcpwm_cmpr_t *comparators[SOC_MCPWM_COMPARATORS_PER_OPERATOR]; // mcpwm comparator array
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mcpwm_trigger_source_t triggers[SOC_MCPWM_TRIGGERS_PER_OPERATOR]; // mcpwm trigger array, can be either a fault or a sync
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mcpwm_soft_fault_t *soft_fault; // mcpwm software fault
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mcpwm_operator_brake_mode_t brake_mode_on_soft_fault; // brake mode on software triggered fault
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mcpwm_operator_brake_mode_t brake_mode_on_gpio_fault[SOC_MCPWM_GPIO_FAULTS_PER_GROUP]; // brake mode on GPIO triggered faults
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uint32_t deadtime_resolution_hz; // resolution of deadtime submodule
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mcpwm_gen_t *posedge_delay_owner; // which generator owns the positive edge delay
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mcpwm_gen_t *negedge_delay_owner; // which generator owns the negative edge delay
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mcpwm_brake_event_cb_t on_brake_cbc; // callback function which would be invoked when mcpwm operator goes into trip zone
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mcpwm_brake_event_cb_t on_brake_ost; // callback function which would be invoked when mcpwm operator goes into trip zone
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void *user_data; // user data which would be passed to the trip zone callback
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};
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struct mcpwm_cmpr_t {
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int cmpr_id; // comparator ID, index from 0
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mcpwm_oper_t *oper; // which operator that the comparator resides in
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intr_handle_t intr; // interrupt handle
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portMUX_TYPE spinlock; // spin lock
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uint32_t compare_ticks; // compare value of this comparator
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mcpwm_compare_event_cb_t on_reach; // ISR callback function which would be invoked on timer counter reaches compare value
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void *user_data; // user data which would be passed to the comparator callbacks
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};
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struct mcpwm_gen_t {
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int gen_id; // generator ID, index from 0
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mcpwm_oper_t *oper; // which operator that the generator resides in
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int gen_gpio_num; // GPIO number used by the generator
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portMUX_TYPE spinlock; // spin lock
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};
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typedef enum {
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MCPWM_FAULT_TYPE_GPIO, // external GPIO fault
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MCPWM_FAULT_TYPE_SOFT, // software fault
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} mcpwm_fault_type_t;
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struct mcpwm_fault_t {
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mcpwm_group_t *group; // which group the fault belongs to
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mcpwm_fault_type_t type; // fault type
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esp_err_t (*del)(mcpwm_fault_t *fault);
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};
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struct mcpwm_gpio_fault_t {
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mcpwm_fault_t base; // base class
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int fault_id; // fault detector ID, index from 0
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int gpio_num; // GPIO number of fault detector
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intr_handle_t intr; // interrupt handle
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mcpwm_fault_event_cb_t on_fault_enter; // ISR callback function that would be invoked when fault signal got triggered
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mcpwm_fault_event_cb_t on_fault_exit; // ISR callback function that would be invoked when fault signal got clear
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void *user_data; // user data which would be passed to the isr_cb
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};
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struct mcpwm_soft_fault_t {
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mcpwm_fault_t base; // base class
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mcpwm_oper_t *oper; // the operator where the soft fault allocated from
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};
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typedef enum {
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MCPWM_SYNC_TYPE_TIMER, // sync event generated by MCPWM timer count event
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MCPWM_SYNC_TYPE_GPIO, // sync event generated by GPIO
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MCPWM_SYNC_TYPE_SOFT, // sync event generated by software
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} mcpwm_sync_src_type_t;
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struct mcpwm_sync_t {
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mcpwm_group_t *group; // which group the sync_src belongs to
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mcpwm_sync_src_type_t type; // sync_src type
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esp_err_t (*del)(mcpwm_sync_t *sync_src);
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};
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struct mcpwm_gpio_sync_src_t {
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mcpwm_sync_t base; // base class
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int sync_id; // sync signal ID
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int gpio_num; // GPIO number
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};
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struct mcpwm_timer_sync_src_t {
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mcpwm_sync_t base; // base class
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mcpwm_timer_t *timer; // timer handle, where this sync_src allocated from
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};
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typedef enum {
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MCPWM_SOFT_SYNC_FROM_NONE, // the software sync event generator has not been assigned
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MCPWM_SOFT_SYNC_FROM_TIMER, // the software sync event is generated by MCPWM timer
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MCPWM_SOFT_SYNC_FROM_CAP, // the software sync event is generated by MCPWM capture timer
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} mcpwm_soft_sync_source_t;
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struct mcpwm_soft_sync_src_t {
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mcpwm_sync_t base; // base class
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mcpwm_soft_sync_source_t soft_sync_from; // where the software sync event is generated by
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union {
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mcpwm_timer_t *timer; // soft sync is generated by which MCPWM timer
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mcpwm_cap_timer_t *cap_timer; // soft sync is generated by which MCPWM capture timer
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};
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};
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typedef enum {
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MCPWM_CAP_TIMER_FSM_INIT,
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MCPWM_CAP_TIMER_FSM_ENABLE,
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} mcpwm_cap_timer_fsm_t;
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typedef enum {
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MCPWM_CAP_CHAN_FSM_INIT,
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MCPWM_CAP_CHAN_FSM_ENABLE,
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} mcpwm_cap_channel_fsm_t;
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struct mcpwm_cap_timer_t {
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mcpwm_group_t *group; // which group the capture timer belongs to
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portMUX_TYPE spinlock; // spin lock, to prevent concurrently accessing capture timer level resources, including registers
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uint32_t resolution_hz; // resolution of capture timer
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mcpwm_cap_timer_fsm_t fsm; // driver FSM
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esp_pm_lock_handle_t pm_lock; // power management lock
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mcpwm_cap_channel_t *cap_channels[SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER]; // capture channel array
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};
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struct mcpwm_cap_channel_t {
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int cap_chan_id; // capture channel ID, index from 0
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mcpwm_cap_timer_t *cap_timer; // which capture timer that the channel resides in
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uint32_t prescale; // prescale of capture signal
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int gpio_num; // GPIO number used by the channel
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mcpwm_cap_channel_fsm_t fsm; // driver FSM
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intr_handle_t intr; // Interrupt handle
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mcpwm_capture_event_cb_t on_cap; // Callback function which would be invoked in capture interrupt routine
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void *user_data; // user data which would be passed to the capture callback
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struct {
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uint32_t reset_io_at_exit: 1; // Whether to reset the GPIO configuration when capture channel is deleted
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} flags;
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};
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mcpwm_group_t *mcpwm_acquire_group_handle(int group_id);
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void mcpwm_release_group_handle(mcpwm_group_t *group);
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esp_err_t mcpwm_select_periph_clock(mcpwm_group_t *group, soc_module_clk_t clk_src);
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#ifdef __cplusplus
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}
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#endif
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