mirror of
https://github.com/espressif/esp-idf.git
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179 lines
5.7 KiB
C
179 lines
5.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include "esp_log.h"
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#include "perfmon.h"
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#include "unity.h"
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#include "xtensa-debug-module.h"
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#include "eri.h"
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#include "xtensa_perfmon_access.h"
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static const char *TAG = "perfmon";
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static void delay(void)
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{
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for (int i = 0 ; i < 1000 ; i++) {
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__asm__ __volatile__("nop");
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}
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}
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TEST_CASE("Start/stop/reset sanity check", "[perfmon]")
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{
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xtensa_perfmon_stop();
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xtensa_perfmon_init(0, 0, 0xffff, 0, 6);
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xtensa_perfmon_reset(0);
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delay();
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uint32_t count_0 = eri_read(ERI_PERFMON_PM0);
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TEST_ASSERT_EQUAL_UINT32_MESSAGE(0, count_0, "Counter should be 0 after reset");
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xtensa_perfmon_start();
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delay();
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uint32_t count_1 = eri_read(ERI_PERFMON_PM0);
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TEST_ASSERT_GREATER_THAN_UINT32_MESSAGE(0, count_1, "Counter should not be 0 after start");
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xtensa_perfmon_stop();
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uint32_t count_2 = eri_read(ERI_PERFMON_PM0);
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delay();
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uint32_t count_3 = eri_read(ERI_PERFMON_PM0);
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TEST_ASSERT_EQUAL_UINT32_MESSAGE(count_2, count_3, "Counter should not change after stop");
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xtensa_perfmon_reset(0);
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xtensa_perfmon_start();
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delay();
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delay();
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uint32_t count_4 = eri_read(ERI_PERFMON_PM0);
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TEST_ASSERT_GREATER_THAN_UINT32_MESSAGE(count_1, count_4, "Counter should be greater when delay is longer");
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xtensa_perfmon_stop();
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}
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static void test_call(void *params)
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{
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delay();
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}
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static void test_callback(void *params, uint32_t select, uint32_t mask, uint32_t value)
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{
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int *call_count = (int *)params;
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ESP_LOGI(TAG, "%s: select=%" PRIu32 ", mask=%" PRIx32 ", value=%" PRIu32,
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__func__, select, mask, value);
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(*call_count)++;
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}
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TEST_CASE("xtensa_perfmon_exec custom callback", "[perfmon]")
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{
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int num_counters = sizeof(xtensa_perfmon_select_mask_all) / sizeof(xtensa_perfmon_select_mask_all[0]) / 2;
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int callback_call_count = 0;
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xtensa_perfmon_config_t pm_config = {
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.counters_size = num_counters,
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.select_mask = xtensa_perfmon_select_mask_all,
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.repeat_count = 200,
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.max_deviation = 1,
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.call_function = test_call,
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.call_params = NULL,
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.callback = test_callback,
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.callback_params = &callback_call_count,
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.tracelevel = -1
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};
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TEST_ESP_OK(xtensa_perfmon_exec(&pm_config));
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TEST_ASSERT_NOT_EQUAL_MESSAGE(0, callback_call_count, "Callback should be called at least once");
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// Performance counters should not have overflow status set
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TEST_ESP_OK(xtensa_perfmon_overflow(0));
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TEST_ESP_OK(xtensa_perfmon_overflow(1));
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TEST_ASSERT_EQUAL_MESSAGE(num_counters, callback_call_count,
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"Callback should be called once for every counter");
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}
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TEST_CASE("xtensa_perfmon_view_cb test", "[perfmon]")
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{
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const uint32_t test_table[] = {
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XTPERF_CNT_CYCLES, XTPERF_MASK_CYCLES, // total cycles
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XTPERF_CNT_INSN, XTPERF_MASK_INSN_ALL, // total instructions
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XTPERF_CNT_D_LOAD_U1, XTPERF_MASK_D_LOAD_LOCAL_MEM, // Mem read
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XTPERF_CNT_D_STORE_U1, XTPERF_MASK_D_STORE_LOCAL_MEM, // Mem write
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XTPERF_CNT_BUBBLES, XTPERF_MASK_BUBBLES_ALL &(~XTPERF_MASK_BUBBLES_R_HOLD_REG_DEP), // wait for other reasons
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XTPERF_CNT_BUBBLES, XTPERF_MASK_BUBBLES_R_HOLD_REG_DEP, // Wait for register dependency
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XTPERF_CNT_OVERFLOW, XTPERF_MASK_OVERFLOW, // Last test cycle
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};
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int num_counters = sizeof(test_table) / sizeof(test_table[0]) / 2;
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// We will collect the output of xtensa_perfmon_view_cb in a string
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// and check that the output matches the counters table above.
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char *out_str = NULL;
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size_t out_len = 0;
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FILE *out_stream = open_memstream(&out_str, &out_len);
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xtensa_perfmon_config_t pm_config = {
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.counters_size = num_counters,
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.select_mask = test_table,
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.repeat_count = 200,
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.max_deviation = 1,
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.call_function = test_call,
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.call_params = NULL,
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.callback = xtensa_perfmon_view_cb,
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.callback_params = out_stream,
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.tracelevel = -1,
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};
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TEST_ESP_OK(xtensa_perfmon_exec(&pm_config));
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fclose(out_stream);
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TEST_ASSERT_MESSAGE(strlen(out_str) > 0, "xtensa_perfmon_view_cb should print something");
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// Check that performance counters defined in test_table are present in the output:
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const char *p = out_str;
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// 1. XTPERF_CNT_CYCLES
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Counts cycles.");
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TEST_ASSERT_NOT_NULL(p);
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// 2. XTPERF_CNT_INSN
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Successfully Retired Instructions.");
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// 3. XTPERF_CNT_D_LOAD_U1
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Load Instruction (Data Memory).");
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// 4. XTPERF_CNT_D_STORE_U1
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Store Instruction (Data Memory).");
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TEST_ASSERT_NOT_NULL(p);
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// 5. XTPERF_CNT_BUBBLES
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Hold and Other Bubble cycles.");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "CTI bubble (e.g. branch delay slot)");
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// 6. XTPERF_CNT_BUBBLES (with a different mask)
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Hold and Other Bubble cycles.");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "R hold caused by register dependency");
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// 7. XTPERF_CNT_OVERFLOW
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p = strstr(p, "Value =");
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TEST_ASSERT_NOT_NULL(p);
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p = strstr(p, "Overflow counter");
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TEST_ASSERT_NOT_NULL(p);
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free(out_str);
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}
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