mirror of
https://github.com/espressif/esp-idf.git
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141 lines
3.7 KiB
C
141 lines
3.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "freertos/FreeRTOS.h"
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#include "hal/clk_gate_ll.h"
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#include "esp_attr.h"
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#include "esp_private/periph_ctrl.h"
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#include "soc/soc_caps.h"
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#if SOC_MODEM_CLOCK_IS_INDEPENDENT
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#include "esp_private/esp_modem_clock.h"
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#endif
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/// @brief For simplicity and backward compatible, we are using the same spin lock for both bus clock on/off and reset
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/// @note We may want to split them into two spin locks in the future
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static portMUX_TYPE periph_spinlock = portMUX_INITIALIZER_UNLOCKED;
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static uint8_t ref_counts[PERIPH_MODULE_MAX] = {0};
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IRAM_ATTR void periph_rcc_enter(void)
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{
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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}
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IRAM_ATTR void periph_rcc_exit(void)
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{
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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}
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uint8_t periph_rcc_acquire_enter(periph_module_t periph)
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{
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periph_rcc_enter();
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return ref_counts[periph];
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}
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void periph_rcc_acquire_exit(periph_module_t periph, uint8_t ref_count)
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{
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ref_counts[periph] = ++ref_count;
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periph_rcc_exit();
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}
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uint8_t periph_rcc_release_enter(periph_module_t periph)
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{
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periph_rcc_enter();
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return ref_counts[periph] - 1;
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}
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void periph_rcc_release_exit(periph_module_t periph, uint8_t ref_count)
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{
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ref_counts[periph] = ref_count;
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periph_rcc_exit();
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}
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void periph_module_enable(periph_module_t periph)
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{
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assert(periph < PERIPH_MODULE_MAX);
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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if (ref_counts[periph] == 0) {
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periph_ll_enable_clk_clear_rst(periph);
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}
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ref_counts[periph]++;
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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}
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void periph_module_disable(periph_module_t periph)
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{
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assert(periph < PERIPH_MODULE_MAX);
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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ref_counts[periph]--;
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if (ref_counts[periph] == 0) {
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periph_ll_disable_clk_set_rst(periph);
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}
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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}
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void periph_module_reset(periph_module_t periph)
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{
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assert(periph < PERIPH_MODULE_MAX);
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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periph_ll_reset(periph);
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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}
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#if !SOC_IEEE802154_BLE_ONLY
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#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED
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IRAM_ATTR void wifi_bt_common_module_enable(void)
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{
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#if SOC_MODEM_CLOCK_IS_INDEPENDENT
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modem_clock_module_enable(PERIPH_PHY_MODULE);
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#else
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
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periph_ll_wifi_bt_module_enable_clk_clear_rst();
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}
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ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]++;
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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#endif
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}
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IRAM_ATTR void wifi_bt_common_module_disable(void)
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{
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#if SOC_MODEM_CLOCK_IS_INDEPENDENT
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modem_clock_module_disable(PERIPH_PHY_MODULE);
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#else
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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ref_counts[PERIPH_WIFI_BT_COMMON_MODULE]--;
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if (ref_counts[PERIPH_WIFI_BT_COMMON_MODULE] == 0) {
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periph_ll_wifi_bt_module_disable_clk_set_rst();
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}
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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#endif
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}
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#endif //#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED
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#endif //#if !SOC_IEEE802154_BLE_ONLY
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#if CONFIG_ESP_WIFI_ENABLED
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void wifi_module_enable(void)
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{
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#if SOC_MODEM_CLOCK_IS_INDEPENDENT
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modem_clock_module_enable(PERIPH_WIFI_MODULE);
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#else
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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periph_ll_wifi_module_enable_clk_clear_rst();
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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#endif
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}
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void wifi_module_disable(void)
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{
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#if SOC_MODEM_CLOCK_IS_INDEPENDENT
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modem_clock_module_disable(PERIPH_WIFI_MODULE);
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#else
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portENTER_CRITICAL_SAFE(&periph_spinlock);
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periph_ll_wifi_module_disable_clk_set_rst();
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portEXIT_CRITICAL_SAFE(&periph_spinlock);
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#endif
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}
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#endif // CONFIG_ESP_WIFI_ENABLED
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