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esp-idf/components/ulp/ulp_riscv
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Sudeep Mohanty f244a8b209 ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 
This commit fixes an issue where in the ULP RISC-V I2C example causes
a spurious wakeup of the main CPU because of a Trap signal when the ULP
core does not meet the wakeup threshold values. This was due to the fact
that the RTC_CNTL_COCPU_DONE signal was being set before the
RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V
core to not reset properly on each cycle.

Closes https://github.com/espressif/esp-idf/issues/10301
2023-01-02 14:21:24 +01:00
..
include ulp: fix missing cpp header guard 2022-08-01 10:19:32 +08:00
ulp_core ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 2023-01-02 14:21:24 +01:00
ulp_riscv_adc.c esp_adc: move adc common hw related code into esp_hw_support 2022-07-28 03:49:48 +00:00
ulp_riscv.c ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2 2023-01-02 14:21:24 +01:00