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esp-idf/components/freertos/port/xtensa
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Marius Vikhammer 3a7ec8acfa freertos: always inline xPortSetInterruptMaskFromISR and vPortClearInterruptMaskFromISR 
These were called from IRAM context where the caller expect them to be inlined
and accessible when cache is disabled. This was not the case when compiled with -O0.

Closes https://github.com/espressif/esp-idf/issues/8301
2022-03-03 09:44:31 +08:00
..
include/freertos freertos: always inline xPortSetInterruptMaskFromISR and vPortClearInterruptMaskFromISR 2022-03-03 09:44:31 +08:00
port.c freertos: ensure interrupts are disabled before enabling tick timer 2021-12-30 18:00:59 +08:00
portasm.S freertos(esp32s3): SysTick uses systimer 2021-08-04 20:33:44 +08:00
readme_xtensa.txt freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xt_asm_utils.h freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_context.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_init.c freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_loadstore_handler.S freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_overlay_os_hook.c freertos: Add RISC-V port 2020-11-13 07:49:11 +11:00
xtensa_vector_defaults.S components/doc: Update doc about high-level interrupt 2021-09-09 20:40:09 +08:00
xtensa_vectors.S components/bt: High level interrupt in bluetooth 2021-09-09 11:29:06 +08:00