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https://github.com/espressif/esp-idf.git
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6d0d2366f7
The commit fixes the case: If variables in RTC RAM have been moved around by the linker, they will be filled with garbage data. Any reset other than OTA would work fine because the variables would still be initialized from the initial bootup. So now system time will be valid even after OTA. Closes https://github.com/espressif/esp-idf/issues/9448
159 lines
6.1 KiB
Plaintext
159 lines
6.1 KiB
Plaintext
/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* ESP32S2 Linker Script Memory Layout
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This file describes the memory layout (memory blocks) by virtual memory addresses.
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This linker script is passed through the C preprocessor to include configuration options.
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Please use preprocessor features sparingly!
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Restrict to simple macros with numeric values, and/or #if/#endif blocks.
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*/
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#include "sdkconfig.h"
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#include "ld.common"
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#ifdef CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB
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#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x2000
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#else
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#define CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE 0x4000
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#endif
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#ifdef CONFIG_ESP32S2_DATA_CACHE_0KB
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#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0
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#elif defined CONFIG_ESP32S2_DATA_CACHE_8KB
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#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x2000
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#else
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#define CONFIG_ESP32S2_DATA_CACHE_SIZE 0x4000
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#endif
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#define RAM_IRAM_START 0x40020000
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#define RAM_DRAM_START 0x3FFB0000
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#define DATA_RAM_END 0x3FFDF000 /* 2nd stage bootloader iram_loader_seg starts at end of block 13 (reclaimed after app boots) */
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#define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
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+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
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#define DRAM_ORG (RAM_DRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
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+ CONFIG_ESP32S2_DATA_CACHE_SIZE)
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#define I_D_RAM_SIZE DATA_RAM_END - DRAM_ORG
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#if CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE
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ASSERT((CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE <= I_D_RAM_SIZE), "Fixed static ram data does not fit.")
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#define DRAM0_0_SEG_LEN CONFIG_ESP32S2_FIXED_STATIC_RAM_SIZE
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#else
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#define DRAM0_0_SEG_LEN I_D_RAM_SIZE
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#endif // CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE
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MEMORY
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{
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/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
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of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
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are connected to the data port of the CPU and eg allow bytewise access. */
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/* IRAM for CPU.*/
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iram0_0_seg (RX) : org = IRAM_ORG, len = I_D_RAM_SIZE
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#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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/* Even though the segment name is iram, it is actually mapped to flash
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*/
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iram0_2_seg (RX) : org = 0x40080020, len = 0x780000-0x20
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/*
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(0x20 offset above is a convenience for the app binary image generation.
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Flash cache has 64KB pages. The .bin file which is flashed to the chip
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has a 0x18 byte file header, and each segment has a 0x08 byte segment
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header. Setting this offset makes it simple to meet the flash cache MMU's
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constraint that (paddr % 64KB == vaddr % 64KB).)
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*/
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#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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/* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */
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dram0_0_seg (RW) : org = DRAM_ORG, len = DRAM0_0_SEG_LEN
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#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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/* Flash mapped constant data */
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drom0_0_seg (R) : org = 0x3F000020, len = 0x3f0000-0x20
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/* (See iram0_2_seg for meaning of 0x20 offset in the above.) */
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#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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/* RTC fast memory (executable). Persists over deep sleep.
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*/
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rtc_iram_seg(RWX) : org = 0x40070000, len = 0x2000 - RESERVE_RTC_MEM
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/* RTC slow memory (data accessible). Persists over deep sleep.
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Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
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*/
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#if CONFIG_ULP_COPROC_ENABLED
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rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM,
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len = 0x2000 - CONFIG_ULP_COPROC_RESERVE_MEM
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#else
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rtc_slow_seg(RW) : org = 0x50000000, len = 0x2000
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#endif // CONFIG_ULP_COPROC_ENABLED
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/* RTC fast memory (same block as above, rtc_iram_seg), viewed from data bus */
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rtc_data_seg(RW) : org = 0x3ff9e000, len = 0x2000 - RESERVE_RTC_MEM
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/* We reduced the size of rtc_data_seg and rtc_iram_seg by RESERVE_RTC_MEM value.
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It reserves the amount of RTC fast memory that we use for this memory segment.
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This segment is intended for keeping:
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- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
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- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
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The aim of this is to keep data that will not be moved around and have a fixed address.
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*/
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rtc_reserved_seg(RW) : org = 0x3ff9e000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
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/* external memory, covers the dport, dram0, dram1 cacheable address space */
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extern_ram_seg(RWX) : org = 0x3F800000,
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len = 0x780000
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}
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#if defined(CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE)
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/* static data ends at defined address */
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_heap_start = DRAM_ORG + DRAM0_0_SEG_LEN;
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#else
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_heap_start = _heap_low_start;
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#endif
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_heap_end = 0x40000000;
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_data_seg_org = ORIGIN(rtc_data_seg);
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/* The lines below define location alias for .rtc.data section based on Kconfig option.
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When the option is not defined then use slow memory segment
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else the data will be placed in fast memory segment
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TODO: check whether the rtc_data_location is correct for esp32s2 - IDF-761 */
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#ifndef CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM
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REGION_ALIAS("rtc_data_location", rtc_slow_seg );
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#else
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REGION_ALIAS("rtc_data_location", rtc_data_seg );
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#endif
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#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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REGION_ALIAS("default_code_seg", iram0_2_seg);
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#else
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REGION_ALIAS("default_code_seg", iram0_0_seg);
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#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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REGION_ALIAS("default_rodata_seg", drom0_0_seg);
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#else
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REGION_ALIAS("default_rodata_seg", dram0_0_seg);
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#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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/**
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* If rodata default segment is placed in `drom0_0_seg`, then flash's first rodata section must
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* also be first in the segment.
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*/
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#ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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ASSERT(_rodata_reserved_start == ORIGIN(default_rodata_seg),
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".flash.appdesc section must be placed at the beginning of the rodata segment.")
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#endif
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