Angus Gratton 9065498a5a esp32: Change 192KB runtime static limit workaround to a 176KB link time workaround ... Turns out some app memory around 0x3ffdc000 is also used by APP CPU. This is a workaround until code to remove the 176KB limit is committed.		2017-12-29 09:11:50 +11:00
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elf_to_ld.sh	Initial public version	2016-08-17 23:08:22 +08:00
esp32.common.ld	soc: place constant data from rtc_clk.c into DRAM	2017-09-26 17:08:49 +08:00
esp32.ld	esp32: Change 192KB runtime static limit workaround to a 176KB link time workaround	2017-12-29 09:11:50 +11:00
esp32.peripherals.ld	feature(I2S-ADC): add ADC mode for I2S.	2017-09-14 13:24:08 +08:00
esp32.rom.ld	component/bt: increase programming delay for event arbiter to allow for heavy workload	2017-09-30 18:12:45 +08:00
esp32.rom.nanofmt.ld	newlib: add "full" formatting support, add missing functions	2016-12-08 11:04:54 +08:00
esp32.rom.spiflash.ld	spiflash ROM functions: Remove Quad I/O mode enable/disable code from flash ROM functions	2017-04-13 17:54:42 +10:00
esp32.rom.spiram_incompatible_fns.ld	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
esp32.spiram.rom-functions-dram.ld	Make sure functions that are in ROM in the non-external-ram-workaround version, are in RAM (and not in flash) in the ext-ram workaround version.	2017-09-13 10:36:56 +08:00
esp32.spiram.rom-functions-iram.ld	Make sure functions that are in ROM in the non-external-ram-workaround version, are in RAM (and not in flash) in the ext-ram workaround version.	2017-09-13 10:36:56 +08:00