mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
874a720286
update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci
136 lines
3.8 KiB
C
136 lines
3.8 KiB
C
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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typedef volatile struct hinf_dev_s {
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union {
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struct {
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uint32_t user_id_fn1: 16;
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uint32_t device_id_fn1: 16;
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};
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uint32_t val;
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} cfg_data0;
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union {
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struct {
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uint32_t sdio_enable: 1;
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uint32_t sdio_ioready1: 1;
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uint32_t highspeed_enable: 1;
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uint32_t highspeed_mode: 1;
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uint32_t sdio_cd_enable: 1;
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uint32_t sdio_ioready2: 1;
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uint32_t sdio_int_mask: 1;
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uint32_t ioenable2: 1;
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uint32_t cd_disable: 1;
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uint32_t func1_eps: 1;
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uint32_t emp: 1;
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uint32_t ioenable1: 1;
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uint32_t sdio20_conf0: 4;
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uint32_t sdio_ver: 12;
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uint32_t func2_eps: 1;
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uint32_t sdio20_conf1: 3;
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};
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uint32_t val;
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} cfg_data1;
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uint32_t reserved_8;
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uint32_t reserved_c;
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uint32_t reserved_10;
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uint32_t reserved_14;
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uint32_t reserved_18;
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union {
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struct {
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uint32_t pin_state: 8;
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uint32_t chip_state: 8;
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uint32_t sdio_rst: 1;
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uint32_t sdio_ioready0: 1;
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uint32_t reserved18: 14;
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};
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uint32_t val;
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} cfg_data7;
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uint32_t cis_conf0; /**/
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uint32_t cis_conf1; /**/
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uint32_t cis_conf2; /**/
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uint32_t cis_conf3; /**/
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uint32_t cis_conf4; /**/
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uint32_t cis_conf5; /**/
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uint32_t cis_conf6; /**/
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uint32_t cis_conf7; /**/
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union {
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struct {
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uint32_t user_id_fn2: 16;
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uint32_t device_id_fn2: 16;
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};
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uint32_t val;
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} cfg_data16;
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uint32_t reserved_44;
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uint32_t reserved_48;
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uint32_t reserved_4c;
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uint32_t reserved_50;
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uint32_t reserved_54;
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uint32_t reserved_58;
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uint32_t reserved_5c;
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uint32_t reserved_60;
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uint32_t reserved_64;
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uint32_t reserved_68;
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uint32_t reserved_6c;
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uint32_t reserved_70;
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uint32_t reserved_74;
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uint32_t reserved_78;
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uint32_t reserved_7c;
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uint32_t reserved_80;
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uint32_t reserved_84;
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uint32_t reserved_88;
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uint32_t reserved_8c;
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uint32_t reserved_90;
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uint32_t reserved_94;
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uint32_t reserved_98;
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uint32_t reserved_9c;
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uint32_t reserved_a0;
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uint32_t reserved_a4;
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uint32_t reserved_a8;
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uint32_t reserved_ac;
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uint32_t reserved_b0;
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uint32_t reserved_b4;
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uint32_t reserved_b8;
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uint32_t reserved_bc;
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uint32_t reserved_c0;
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uint32_t reserved_c4;
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uint32_t reserved_c8;
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uint32_t reserved_cc;
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uint32_t reserved_d0;
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uint32_t reserved_d4;
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uint32_t reserved_d8;
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uint32_t reserved_dc;
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uint32_t reserved_e0;
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uint32_t reserved_e4;
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uint32_t reserved_e8;
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uint32_t reserved_ec;
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uint32_t reserved_f0;
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uint32_t reserved_f4;
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uint32_t reserved_f8;
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uint32_t date; /**/
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} hinf_dev_t;
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extern hinf_dev_t HINF;
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#ifdef __cplusplus
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}
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#endif
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