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https://github.com/espressif/esp-idf.git
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195 lines
6.8 KiB
C
195 lines
6.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/hal_utils.h"
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#include "hal/assert.h"
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#ifndef BIT
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#define BIT(n) (1UL << (n))
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#endif
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#ifndef BIT_MASK
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#define BIT_MASK(n) (BIT(n) - 1)
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#endif
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__attribute__((always_inline))
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static inline uint32_t _sub_abs(uint32_t a, uint32_t b)
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{
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return a > b ? a - b : b - a;
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}
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uint32_t hal_utils_calc_clk_div_frac_fast(const hal_utils_clk_info_t *clk_info, hal_utils_clk_div_t *clk_div)
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{
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HAL_ASSERT(clk_info->max_fract > 2);
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uint32_t div_denom = 2;
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uint32_t div_numer = 0;
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uint32_t div_integ = clk_info->src_freq_hz / clk_info->exp_freq_hz;
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uint32_t freq_error = clk_info->src_freq_hz % clk_info->exp_freq_hz;
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// fractional divider
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if (freq_error) {
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// Carry bit if the decimal is greater than 1.0 - 1.0 / ((max_fract - 1) * 2)
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if (freq_error < clk_info->exp_freq_hz - clk_info->exp_freq_hz / (clk_info->max_fract - 1) * 2) {
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// Calculate the Greatest Common Divisor, time complexity O(log n)
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uint32_t gcd = hal_utils_gcd(clk_info->exp_freq_hz, freq_error);
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// divide by the Greatest Common Divisor to get the accurate fraction before normalization
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div_denom = clk_info->exp_freq_hz / gcd;
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div_numer = freq_error / gcd;
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// normalize div_denom and div_numer
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uint32_t d = div_denom / clk_info->max_fract + 1;
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// divide by the normalization coefficient to get the denominator and numerator within range of clk_info->max_fract
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div_denom /= d;
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div_numer /= d;
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} else {
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div_integ++;
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}
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}
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// If the expect frequency is too high or too low to satisfy the integral division range, failed and return 0
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if (div_integ < clk_info->min_integ || div_integ >= clk_info->max_integ || div_integ == 0) {
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return 0;
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}
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// Assign result
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clk_div->integer = div_integ;
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clk_div->denominator = div_denom;
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clk_div->numerator = div_numer;
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// Return the actual frequency
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if (div_numer) {
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uint32_t temp = div_integ * div_denom + div_numer;
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return (uint32_t)(((uint64_t)clk_info->src_freq_hz * div_denom + temp / 2) / temp);
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}
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return clk_info->src_freq_hz / div_integ;
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}
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uint32_t hal_utils_calc_clk_div_frac_accurate(const hal_utils_clk_info_t *clk_info, hal_utils_clk_div_t *clk_div)
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{
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HAL_ASSERT(clk_info->max_fract > 2);
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uint32_t div_denom = 2;
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uint32_t div_numer = 0;
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uint32_t div_integ = clk_info->src_freq_hz / clk_info->exp_freq_hz;
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uint32_t freq_error = clk_info->src_freq_hz % clk_info->exp_freq_hz;
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if (freq_error) {
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// Carry bit if the decimal is greater than 1.0 - 1.0 / ((max_fract - 1) * 2)
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if (freq_error < clk_info->exp_freq_hz - clk_info->exp_freq_hz / (clk_info->max_fract - 1) * 2) {
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// Search the closest fraction, time complexity O(n)
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for (uint32_t sub = 0, a = 2, b = 0, min = UINT32_MAX; min && a < clk_info->max_fract; a++) {
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b = (a * freq_error + clk_info->exp_freq_hz / 2) / clk_info->exp_freq_hz;
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sub = _sub_abs(clk_info->exp_freq_hz * b, freq_error * a);
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if (sub < min) {
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div_denom = a;
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div_numer = b;
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min = sub;
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}
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}
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} else {
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div_integ++;
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}
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}
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// If the expect frequency is too high or too low to satisfy the integral division range, failed and return 0
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if (div_integ < clk_info->min_integ || div_integ >= clk_info->max_integ || div_integ == 0) {
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return 0;
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}
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// Assign result
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clk_div->integer = div_integ;
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clk_div->denominator = div_denom;
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clk_div->numerator = div_numer;
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// Return the actual frequency
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if (div_numer) {
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uint32_t temp = div_integ * div_denom + div_numer;
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return (uint32_t)(((uint64_t)clk_info->src_freq_hz * div_denom + temp / 2) / temp);
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}
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return clk_info->src_freq_hz / div_integ;
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}
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uint32_t hal_utils_calc_clk_div_integer(const hal_utils_clk_info_t *clk_info, uint32_t *int_div)
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{
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uint32_t div_integ = clk_info->src_freq_hz / clk_info->exp_freq_hz;
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uint32_t freq_error = clk_info->src_freq_hz % clk_info->exp_freq_hz;
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/* If there is error and always round up,
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Or, do the normal rounding and error >= (src/n + src/(n+1)) / 2,
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then carry the bit */
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if ((freq_error && clk_info->round_opt == HAL_DIV_ROUND_UP) || (clk_info->round_opt == HAL_DIV_ROUND &&
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(freq_error >= clk_info->src_freq_hz / (2 * div_integ * (div_integ + 1))))) {
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div_integ++;
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}
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/* Check the integral division whether in range [min_integ, max_integ) */
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/* If the result is less than the minimum, set the division to the minimum but return 0 */
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if (div_integ < clk_info->min_integ) {
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*int_div = clk_info->min_integ;
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return 0;
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}
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/* if the result is greater or equal to the maximum , set the division to the maximum but return 0 */
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if (div_integ >= clk_info->max_integ) {
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*int_div = clk_info->max_integ - 1;
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return 0;
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}
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// Assign result
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*int_div = div_integ;
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// Return the actual frequency
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return clk_info->src_freq_hz / div_integ;
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}
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typedef union {
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struct {
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uint32_t mantissa: 23;
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uint32_t exponent: 8;
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uint32_t sign: 1;
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};
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uint32_t val;
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} hal_utils_ieee754_float_t;
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int hal_utils_float_to_fixed_point_32b(float flt, const hal_utils_fixed_point_t *fp_cfg, uint32_t *fp_out)
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{
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int ret = 0;
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uint32_t output = 0;
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const hal_utils_ieee754_float_t *f = (const hal_utils_ieee754_float_t *)&flt;
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if (fp_cfg->int_bit + fp_cfg->frac_bit > 31) {
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// Not supported
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return -3;
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}
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if (f->val == 0) { // Zero case
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*fp_out = 0;
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return 0;
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}
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if (f->exponent != 0xFF) { // Normal case
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int real_exp = (int)f->exponent - 127;
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uint32_t real_mant = f->mantissa | BIT(23); // Add the hidden bit
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// Overflow check
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if (real_exp >= (int)fp_cfg->int_bit) {
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ret = -1;
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}
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// Determine sign
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output |= f->sign << (fp_cfg->int_bit + fp_cfg->frac_bit);
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// Determine integer and fraction part
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int shift = 23 - fp_cfg->frac_bit - real_exp;
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output |= shift >= 0 ? real_mant >> shift : real_mant << -shift;
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} else {
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if (f->mantissa && f->mantissa < BIT(23) - 1) { // NaN (Not-a-Number) case
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return -2;
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} else { // Infinity or Largest Number case
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output = f->sign ? ~(uint32_t)0 : BIT(31) - 1;
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ret = -1;
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}
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}
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if (ret != 0 && fp_cfg->saturation) {
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*fp_out = (f->sign << (fp_cfg->int_bit + fp_cfg->frac_bit)) |
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(BIT_MASK(fp_cfg->int_bit + fp_cfg->frac_bit));
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} else {
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*fp_out = output;
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}
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return ret;
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}
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