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https://github.com/espressif/esp-idf.git
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1012 lines
28 KiB
C
1012 lines
28 KiB
C
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include <stdbool.h>
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#include <stdarg.h>
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/fcntl.h>
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#include <sys/param.h>
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#include "esp_vfs.h"
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#include "esp_vfs_dev.h"
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#include "esp_attr.h"
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#include "driver/uart.h"
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#include "sdkconfig.h"
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#include "driver/uart_select.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/uart.h"
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#elif CONFIG_IDF_TARGET_ESP32S2BETA
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#include "esp32s2beta/rom/uart.h"
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#endif
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// TODO: make the number of UARTs chip dependent
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#define UART_NUM SOC_UART_NUM
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// Token signifying that no character is available
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#define NONE -1
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#if CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF
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# define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CRLF
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#elif CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR
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# define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CR
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#else
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# define DEFAULT_TX_MODE ESP_LINE_ENDINGS_LF
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#endif
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#if CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF
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# define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CRLF
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#elif CONFIG_NEWLIB_STDIN_LINE_ENDING_CR
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# define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CR
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#else
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# define DEFAULT_RX_MODE ESP_LINE_ENDINGS_LF
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#endif
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// UART write bytes function type
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typedef void (*tx_func_t)(int, int);
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// UART read bytes function type
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typedef int (*rx_func_t)(int);
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// Basic functions for sending and receiving bytes over UART
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static void uart_tx_char(int fd, int c);
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static int uart_rx_char(int fd);
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// Functions for sending and receiving bytes which use UART driver
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static void uart_tx_char_via_driver(int fd, int c);
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static int uart_rx_char_via_driver(int fd);
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typedef struct {
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// Pointers to UART peripherals
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uart_dev_t* uart;
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// One-character buffer used for newline conversion code, per UART
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int peek_char;
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// per-UART locks, lazily initialized
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_lock_t read_lock;
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_lock_t write_lock;
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// Per-UART non-blocking flag. Note: default implementation does not honor this
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// flag, all reads are non-blocking. This option becomes effective if UART
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// driver is used.
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bool non_blocking;
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// Newline conversion mode when transmitting
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esp_line_endings_t tx_mode;
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// Newline conversion mode when receiving
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esp_line_endings_t rx_mode;
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// Functions used to write bytes to UART. Default to "basic" functions.
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tx_func_t tx_func;
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// Functions used to read bytes from UART. Default to "basic" functions.
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rx_func_t rx_func;
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} vfs_uart_context_t;
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#define VFS_CTX_DEFAULT_VAL(uart_dev) (vfs_uart_context_t) {\
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.uart = (uart_dev),\
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.peek_char = NONE,\
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.tx_mode = DEFAULT_TX_MODE,\
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.rx_mode = DEFAULT_RX_MODE,\
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.tx_func = uart_tx_char,\
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.rx_func = uart_rx_char,\
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}
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//If the context should be dynamically initialized, remove this structure
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//and point s_ctx to allocated data.
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static vfs_uart_context_t s_context[UART_NUM] = {
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VFS_CTX_DEFAULT_VAL(&UART0),
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VFS_CTX_DEFAULT_VAL(&UART1),
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#if UART_NUM > 2
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VFS_CTX_DEFAULT_VAL(&UART2),
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#endif
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};
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static vfs_uart_context_t* s_ctx[UART_NUM] = {
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&s_context[0],
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&s_context[1],
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#if UART_NUM > 2
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&s_context[2],
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#endif
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};
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typedef struct {
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esp_vfs_select_sem_t select_sem;
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fd_set *readfds;
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fd_set *writefds;
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fd_set *errorfds;
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fd_set readfds_orig;
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fd_set writefds_orig;
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fd_set errorfds_orig;
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} uart_select_args_t;
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static uart_select_args_t **s_registered_selects = NULL;
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static int s_registered_select_num = 0;
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static portMUX_TYPE s_registered_select_lock = portMUX_INITIALIZER_UNLOCKED;
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static esp_err_t uart_end_select(void *end_select_args);
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static int uart_open(const char * path, int flags, int mode)
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{
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// this is fairly primitive, we should check if file is opened read only,
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// and error out if write is requested
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int fd = -1;
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if (strcmp(path, "/0") == 0) {
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fd = 0;
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} else if (strcmp(path, "/1") == 0) {
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fd = 1;
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} else if (strcmp(path, "/2") == 0) {
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fd = 2;
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} else {
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errno = ENOENT;
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return fd;
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}
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s_ctx[fd]->non_blocking = ((flags & O_NONBLOCK) == O_NONBLOCK);
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return fd;
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}
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static void uart_tx_char(int fd, int c)
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{
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uart_dev_t* uart = s_ctx[fd]->uart;
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while (uart->status.txfifo_cnt >= 127) {
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;
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}
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#if CONFIG_IDF_TARGET_ESP32
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uart->fifo.rw_byte = c;
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#elif CONFIG_IDF_TARGET_ESP32S2BETA
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uart->ahb_fifo.rw_byte = c;
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#endif
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}
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static void uart_tx_char_via_driver(int fd, int c)
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{
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char ch = (char) c;
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uart_write_bytes(fd, &ch, 1);
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}
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static int uart_rx_char(int fd)
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{
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uart_dev_t* uart = s_ctx[fd]->uart;
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if (uart->status.rxfifo_cnt == 0) {
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return NONE;
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}
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#if CONFIG_IDF_TARGET_ESP32
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return uart->fifo.rw_byte;
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#elif CONFIG_IDF_TARGET_ESP32S2BETA
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return uart->ahb_fifo.rw_byte;
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#endif
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}
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static int uart_rx_char_via_driver(int fd)
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{
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uint8_t c;
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int timeout = s_ctx[fd]->non_blocking ? 0 : portMAX_DELAY;
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int n = uart_read_bytes(fd, &c, 1, timeout);
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if (n <= 0) {
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return NONE;
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}
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return c;
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}
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static ssize_t uart_write(int fd, const void * data, size_t size)
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{
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assert(fd >=0 && fd < 3);
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const char *data_c = (const char *)data;
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/* Even though newlib does stream locking on each individual stream, we need
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* a dedicated UART lock if two streams (stdout and stderr) point to the
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* same UART.
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*/
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_lock_acquire_recursive(&s_ctx[fd]->write_lock);
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for (size_t i = 0; i < size; i++) {
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int c = data_c[i];
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if (c == '\n' && s_ctx[fd]->tx_mode != ESP_LINE_ENDINGS_LF) {
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s_ctx[fd]->tx_func(fd, '\r');
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if (s_ctx[fd]->tx_mode == ESP_LINE_ENDINGS_CR) {
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continue;
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}
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}
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s_ctx[fd]->tx_func(fd, c);
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}
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_lock_release_recursive(&s_ctx[fd]->write_lock);
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return size;
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}
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/* Helper function which returns a previous character or reads a new one from
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* UART. Previous character can be returned ("pushed back") using
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* uart_return_char function.
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*/
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static int uart_read_char(int fd)
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{
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/* return character from peek buffer, if it is there */
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if (s_ctx[fd]->peek_char != NONE) {
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int c = s_ctx[fd]->peek_char;
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s_ctx[fd]->peek_char = NONE;
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return c;
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}
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return s_ctx[fd]->rx_func(fd);
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}
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/* Push back a character; it will be returned by next call to uart_read_char */
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static void uart_return_char(int fd, int c)
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{
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assert(s_ctx[fd]->peek_char == NONE);
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s_ctx[fd]->peek_char = c;
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}
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static ssize_t uart_read(int fd, void* data, size_t size)
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{
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assert(fd >=0 && fd < 3);
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char *data_c = (char *) data;
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size_t received = 0;
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_lock_acquire_recursive(&s_ctx[fd]->read_lock);
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while (received < size) {
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int c = uart_read_char(fd);
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if (c == '\r') {
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if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
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c = '\n';
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} else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
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/* look ahead */
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int c2 = uart_read_char(fd);
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if (c2 == NONE) {
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/* could not look ahead, put the current character back */
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uart_return_char(fd, c);
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break;
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}
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if (c2 == '\n') {
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/* this was \r\n sequence. discard \r, return \n */
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c = '\n';
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} else {
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/* \r followed by something else. put the second char back,
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* it will be processed on next iteration. return \r now.
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*/
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uart_return_char(fd, c2);
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}
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}
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} else if (c == NONE) {
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break;
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}
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data_c[received] = (char) c;
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++received;
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if (c == '\n') {
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break;
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}
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}
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_lock_release_recursive(&s_ctx[fd]->read_lock);
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if (received > 0) {
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return received;
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}
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errno = EWOULDBLOCK;
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return -1;
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}
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static int uart_fstat(int fd, struct stat * st)
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{
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assert(fd >=0 && fd < 3);
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st->st_mode = S_IFCHR;
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return 0;
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}
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static int uart_close(int fd)
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{
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assert(fd >=0 && fd < 3);
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return 0;
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}
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static int uart_fcntl(int fd, int cmd, int arg)
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{
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assert(fd >=0 && fd < 3);
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int result = 0;
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if (cmd == F_GETFL) {
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if (s_ctx[fd]->non_blocking) {
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result |= O_NONBLOCK;
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}
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} else if (cmd == F_SETFL) {
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s_ctx[fd]->non_blocking = (arg & O_NONBLOCK) != 0;
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} else {
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// unsupported operation
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result = -1;
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errno = ENOSYS;
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}
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return result;
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}
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static int uart_access(const char *path, int amode)
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{
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int ret = -1;
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if (strcmp(path, "/0") == 0 || strcmp(path, "/1") == 0 || strcmp(path, "/2") == 0) {
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if (F_OK == amode) {
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ret = 0; //path exists
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} else {
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if ((((amode & R_OK) == R_OK) || ((amode & W_OK) == W_OK)) && ((amode & X_OK) != X_OK)) {
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ret = 0; //path is readable and/or writable but not executable
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} else {
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errno = EACCES;
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}
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}
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} else {
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errno = ENOENT;
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}
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return ret;
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}
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static int uart_fsync(int fd)
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{
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assert(fd >= 0 && fd < 3);
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_lock_acquire_recursive(&s_ctx[fd]->write_lock);
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uart_tx_wait_idle((uint8_t) fd);
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_lock_release_recursive(&s_ctx[fd]->write_lock);
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return 0;
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}
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static esp_err_t register_select(uart_select_args_t *args)
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{
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esp_err_t ret = ESP_ERR_INVALID_ARG;
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if (args) {
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portENTER_CRITICAL(&s_registered_select_lock);
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const int new_size = s_registered_select_num + 1;
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if ((s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *))) == NULL) {
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ret = ESP_ERR_NO_MEM;
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} else {
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s_registered_selects[s_registered_select_num] = args;
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s_registered_select_num = new_size;
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ret = ESP_OK;
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}
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portEXIT_CRITICAL(&s_registered_select_lock);
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}
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return ret;
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}
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static esp_err_t unregister_select(uart_select_args_t *args)
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{
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esp_err_t ret = ESP_OK;
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if (args) {
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ret = ESP_ERR_INVALID_STATE;
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portENTER_CRITICAL(&s_registered_select_lock);
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for (int i = 0; i < s_registered_select_num; ++i) {
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if (s_registered_selects[i] == args) {
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const int new_size = s_registered_select_num - 1;
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// The item is removed by overwriting it with the last item. The subsequent rellocation will drop the
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// last item.
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s_registered_selects[i] = s_registered_selects[new_size];
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s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *));
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if (s_registered_selects || new_size == 0) {
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s_registered_select_num = new_size;
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ret = ESP_OK;
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} else {
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ret = ESP_ERR_NO_MEM;
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}
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break;
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}
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}
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portEXIT_CRITICAL(&s_registered_select_lock);
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}
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return ret;
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}
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static void select_notif_callback_isr(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken)
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{
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portENTER_CRITICAL_ISR(&s_registered_select_lock);
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for (int i = 0; i < s_registered_select_num; ++i) {
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uart_select_args_t *args = s_registered_selects[i];
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if (args) {
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switch (uart_select_notif) {
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case UART_SELECT_READ_NOTIF:
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if (FD_ISSET(uart_num, &args->readfds_orig)) {
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FD_SET(uart_num, args->readfds);
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esp_vfs_select_triggered_isr(args->select_sem, task_woken);
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}
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break;
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case UART_SELECT_WRITE_NOTIF:
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if (FD_ISSET(uart_num, &args->writefds_orig)) {
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FD_SET(uart_num, args->writefds);
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esp_vfs_select_triggered_isr(args->select_sem, task_woken);
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}
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break;
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case UART_SELECT_ERROR_NOTIF:
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if (FD_ISSET(uart_num, &args->errorfds_orig)) {
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FD_SET(uart_num, args->errorfds);
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esp_vfs_select_triggered_isr(args->select_sem, task_woken);
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}
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break;
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}
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}
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}
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portEXIT_CRITICAL_ISR(&s_registered_select_lock);
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}
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static esp_err_t uart_start_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds,
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esp_vfs_select_sem_t select_sem, void **end_select_args)
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{
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const int max_fds = MIN(nfds, UART_NUM);
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*end_select_args = NULL;
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uart_select_args_t *args = malloc(sizeof(uart_select_args_t));
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if (args == NULL) {
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return ESP_ERR_NO_MEM;
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}
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args->select_sem = select_sem;
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args->readfds = readfds;
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args->writefds = writefds;
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args->errorfds = exceptfds;
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args->readfds_orig = *readfds; // store the original values because they will be set to zero
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args->writefds_orig = *writefds;
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args->errorfds_orig = *exceptfds;
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FD_ZERO(readfds);
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FD_ZERO(writefds);
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FD_ZERO(exceptfds);
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portENTER_CRITICAL(uart_get_selectlock());
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//uart_set_select_notif_callback sets the callbacks in UART ISR
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for (int i = 0; i < max_fds; ++i) {
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if (FD_ISSET(i, &args->readfds_orig) || FD_ISSET(i, &args->writefds_orig) || FD_ISSET(i, &args->errorfds_orig)) {
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uart_set_select_notif_callback(i, select_notif_callback_isr);
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}
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}
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for (int i = 0; i < max_fds; ++i) {
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if (FD_ISSET(i, &args->readfds_orig)) {
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size_t buffered_size;
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if (uart_get_buffered_data_len(i, &buffered_size) == ESP_OK && buffered_size > 0) {
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// signalize immediately when data is buffered
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FD_SET(i, readfds);
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esp_vfs_select_triggered(args->select_sem);
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}
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}
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}
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esp_err_t ret = register_select(args);
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if (ret != ESP_OK) {
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portEXIT_CRITICAL(uart_get_selectlock());
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free(args);
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return ret;
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}
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portEXIT_CRITICAL(uart_get_selectlock());
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*end_select_args = args;
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return ESP_OK;
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}
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static esp_err_t uart_end_select(void *end_select_args)
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{
|
|
uart_select_args_t *args = end_select_args;
|
|
|
|
portENTER_CRITICAL(uart_get_selectlock());
|
|
esp_err_t ret = unregister_select(args);
|
|
for (int i = 0; i < UART_NUM; ++i) {
|
|
uart_set_select_notif_callback(i, NULL);
|
|
}
|
|
portEXIT_CRITICAL(uart_get_selectlock());
|
|
|
|
if (args) {
|
|
free(args);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_VFS_SUPPORT_TERMIOS
|
|
static int uart_tcsetattr(int fd, int optional_actions, const struct termios *p)
|
|
{
|
|
if (fd < 0 || fd >= UART_NUM) {
|
|
errno = EBADF;
|
|
return -1;
|
|
}
|
|
|
|
if (p == NULL) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
switch (optional_actions) {
|
|
case TCSANOW:
|
|
// nothing to do
|
|
break;
|
|
case TCSADRAIN:
|
|
if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
/* FALLTHRU */
|
|
|
|
case TCSAFLUSH:
|
|
if (uart_flush_input(fd) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
break;
|
|
default:
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
if (p->c_iflag & IGNCR) {
|
|
s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CRLF;
|
|
} else if (p->c_iflag & ICRNL) {
|
|
s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CR;
|
|
} else {
|
|
s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_LF;
|
|
}
|
|
|
|
// output line endings are not supported because there is no alternative in termios for converting LF to CR
|
|
|
|
{
|
|
uart_word_length_t data_bits;
|
|
const tcflag_t csize_bits = p->c_cflag & CSIZE;
|
|
|
|
switch (csize_bits) {
|
|
case CS5:
|
|
data_bits = UART_DATA_5_BITS;
|
|
break;
|
|
case CS6:
|
|
data_bits = UART_DATA_6_BITS;
|
|
break;
|
|
case CS7:
|
|
data_bits = UART_DATA_7_BITS;
|
|
break;
|
|
case CS8:
|
|
data_bits = UART_DATA_8_BITS;
|
|
break;
|
|
default:
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
if (uart_set_word_length(fd, data_bits) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
if (uart_set_stop_bits(fd, (p->c_cflag & CSTOPB) ? UART_STOP_BITS_2 : UART_STOP_BITS_1) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
if (uart_set_parity(fd, (p->c_cflag & PARENB) ?
|
|
((p->c_cflag & PARODD) ? UART_PARITY_ODD : UART_PARITY_EVEN)
|
|
:
|
|
UART_PARITY_DISABLE) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
if (p->c_cflag & (CBAUD | CBAUDEX)) {
|
|
if (p->c_ispeed != p->c_ospeed) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
} else {
|
|
uint32_t b;
|
|
if (p->c_cflag & BOTHER) {
|
|
b = p->c_ispeed;
|
|
} else {
|
|
switch (p->c_ispeed) {
|
|
case B0:
|
|
b = 0;
|
|
break;
|
|
case B50:
|
|
b = 50;
|
|
break;
|
|
case B75:
|
|
b = 75;
|
|
break;
|
|
case B110:
|
|
b = 110;
|
|
break;
|
|
case B134:
|
|
b = 134;
|
|
break;
|
|
case B150:
|
|
b = 150;
|
|
break;
|
|
case B200:
|
|
b = 200;
|
|
break;
|
|
case B300:
|
|
b = 300;
|
|
break;
|
|
case B600:
|
|
b = 600;
|
|
break;
|
|
case B1200:
|
|
b = 1200;
|
|
break;
|
|
case B1800:
|
|
b = 1800;
|
|
break;
|
|
case B2400:
|
|
b = 2400;
|
|
break;
|
|
case B4800:
|
|
b = 4800;
|
|
break;
|
|
case B9600:
|
|
b = 9600;
|
|
break;
|
|
case B19200:
|
|
b = 19200;
|
|
break;
|
|
case B38400:
|
|
b = 38400;
|
|
break;
|
|
case B57600:
|
|
b = 57600;
|
|
break;
|
|
case B115200:
|
|
b = 115200;
|
|
break;
|
|
case B230400:
|
|
b = 230400;
|
|
break;
|
|
case B460800:
|
|
b = 460800;
|
|
break;
|
|
case B500000:
|
|
b = 500000;
|
|
break;
|
|
case B576000:
|
|
b = 576000;
|
|
break;
|
|
case B921600:
|
|
b = 921600;
|
|
break;
|
|
case B1000000:
|
|
b = 1000000;
|
|
break;
|
|
case B1152000:
|
|
b = 1152000;
|
|
break;
|
|
case B1500000:
|
|
b = 1500000;
|
|
break;
|
|
case B2000000:
|
|
b = 2000000;
|
|
break;
|
|
case B2500000:
|
|
b = 2500000;
|
|
break;
|
|
case B3000000:
|
|
b = 3000000;
|
|
break;
|
|
case B3500000:
|
|
b = 3500000;
|
|
break;
|
|
case B4000000:
|
|
b = 4000000;
|
|
break;
|
|
default:
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
if (uart_set_baudrate(fd, b) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uart_tcgetattr(int fd, struct termios *p)
|
|
{
|
|
if (fd < 0 || fd >= UART_NUM) {
|
|
errno = EBADF;
|
|
return -1;
|
|
}
|
|
|
|
if (p == NULL) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
memset(p, 0, sizeof(struct termios));
|
|
|
|
if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
|
|
p->c_iflag |= IGNCR;
|
|
} else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
|
|
p->c_iflag |= ICRNL;
|
|
}
|
|
|
|
{
|
|
uart_word_length_t data_bits;
|
|
|
|
if (uart_get_word_length(fd, &data_bits) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
p->c_cflag &= (~CSIZE);
|
|
|
|
switch (data_bits) {
|
|
case UART_DATA_5_BITS:
|
|
p->c_cflag |= CS5;
|
|
break;
|
|
case UART_DATA_6_BITS:
|
|
p->c_cflag |= CS6;
|
|
break;
|
|
case UART_DATA_7_BITS:
|
|
p->c_cflag |= CS7;
|
|
break;
|
|
case UART_DATA_8_BITS:
|
|
p->c_cflag |= CS8;
|
|
break;
|
|
default:
|
|
errno = ENOSYS;
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
{
|
|
uart_stop_bits_t stop_bits;
|
|
if (uart_get_stop_bits(fd, &stop_bits) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
switch (stop_bits) {
|
|
case UART_STOP_BITS_1:
|
|
// nothing to do
|
|
break;
|
|
case UART_STOP_BITS_2:
|
|
p->c_cflag |= CSTOPB;
|
|
break;
|
|
default:
|
|
// UART_STOP_BITS_1_5 is unsupported by termios
|
|
errno = ENOSYS;
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
{
|
|
uart_parity_t parity_mode;
|
|
if (uart_get_parity(fd, &parity_mode) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
switch (parity_mode) {
|
|
case UART_PARITY_EVEN:
|
|
p->c_cflag |= PARENB;
|
|
break;
|
|
case UART_PARITY_ODD:
|
|
p->c_cflag |= (PARENB | PARODD);
|
|
break;
|
|
case UART_PARITY_DISABLE:
|
|
// nothing to do
|
|
break;
|
|
default:
|
|
errno = ENOSYS;
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
{
|
|
uint32_t baudrate;
|
|
if (uart_get_baudrate(fd, &baudrate) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
p->c_cflag |= (CBAUD | CBAUDEX);
|
|
|
|
speed_t sp;
|
|
switch (baudrate) {
|
|
case 0:
|
|
sp = B0;
|
|
break;
|
|
case 50:
|
|
sp = B50;
|
|
break;
|
|
case 75:
|
|
sp = B75;
|
|
break;
|
|
case 110:
|
|
sp = B110;
|
|
break;
|
|
case 134:
|
|
sp = B134;
|
|
break;
|
|
case 150:
|
|
sp = B150;
|
|
break;
|
|
case 200:
|
|
sp = B200;
|
|
break;
|
|
case 300:
|
|
sp = B300;
|
|
break;
|
|
case 600:
|
|
sp = B600;
|
|
break;
|
|
case 1200:
|
|
sp = B1200;
|
|
break;
|
|
case 1800:
|
|
sp = B1800;
|
|
break;
|
|
case 2400:
|
|
sp = B2400;
|
|
break;
|
|
case 4800:
|
|
sp = B4800;
|
|
break;
|
|
case 9600:
|
|
sp = B9600;
|
|
break;
|
|
case 19200:
|
|
sp = B19200;
|
|
break;
|
|
case 38400:
|
|
sp = B38400;
|
|
break;
|
|
case 57600:
|
|
sp = B57600;
|
|
break;
|
|
case 115200:
|
|
sp = B115200;
|
|
break;
|
|
case 230400:
|
|
sp = B230400;
|
|
break;
|
|
case 460800:
|
|
sp = B460800;
|
|
break;
|
|
case 500000:
|
|
sp = B500000;
|
|
break;
|
|
case 576000:
|
|
sp = B576000;
|
|
break;
|
|
case 921600:
|
|
sp = B921600;
|
|
break;
|
|
case 1000000:
|
|
sp = B1000000;
|
|
break;
|
|
case 1152000:
|
|
sp = B1152000;
|
|
break;
|
|
case 1500000:
|
|
sp = B1500000;
|
|
break;
|
|
case 2000000:
|
|
sp = B2000000;
|
|
break;
|
|
case 2500000:
|
|
sp = B2500000;
|
|
break;
|
|
case 3000000:
|
|
sp = B3000000;
|
|
break;
|
|
case 3500000:
|
|
sp = B3500000;
|
|
break;
|
|
case 4000000:
|
|
sp = B4000000;
|
|
break;
|
|
default:
|
|
p->c_cflag |= BOTHER;
|
|
sp = baudrate;
|
|
break;
|
|
}
|
|
|
|
p->c_ispeed = p->c_ospeed = sp;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uart_tcdrain(int fd)
|
|
{
|
|
if (fd < 0 || fd >= UART_NUM) {
|
|
errno = EBADF;
|
|
return -1;
|
|
}
|
|
|
|
if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uart_tcflush(int fd, int select)
|
|
{
|
|
if (fd < 0 || fd >= UART_NUM) {
|
|
errno = EBADF;
|
|
return -1;
|
|
}
|
|
|
|
if (select == TCIFLUSH) {
|
|
if (uart_flush_input(fd) != ESP_OK) {
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
} else {
|
|
// output flushing is not supported
|
|
errno = EINVAL;
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif // CONFIG_VFS_SUPPORT_TERMIOS
|
|
|
|
void esp_vfs_dev_uart_register(void)
|
|
{
|
|
esp_vfs_t vfs = {
|
|
.flags = ESP_VFS_FLAG_DEFAULT,
|
|
.write = &uart_write,
|
|
.open = &uart_open,
|
|
.fstat = &uart_fstat,
|
|
.close = &uart_close,
|
|
.read = &uart_read,
|
|
.fcntl = &uart_fcntl,
|
|
.fsync = &uart_fsync,
|
|
.access = &uart_access,
|
|
.start_select = &uart_start_select,
|
|
.end_select = &uart_end_select,
|
|
#ifdef CONFIG_VFS_SUPPORT_TERMIOS
|
|
.tcsetattr = &uart_tcsetattr,
|
|
.tcgetattr = &uart_tcgetattr,
|
|
.tcdrain = &uart_tcdrain,
|
|
.tcflush = &uart_tcflush,
|
|
#endif // CONFIG_VFS_SUPPORT_TERMIOS
|
|
};
|
|
ESP_ERROR_CHECK(esp_vfs_register("/dev/uart", &vfs, NULL));
|
|
}
|
|
|
|
void esp_vfs_dev_uart_set_rx_line_endings(esp_line_endings_t mode)
|
|
{
|
|
for (int i = 0; i < UART_NUM; ++i) {
|
|
s_ctx[i]->rx_mode = mode;
|
|
}
|
|
}
|
|
|
|
void esp_vfs_dev_uart_set_tx_line_endings(esp_line_endings_t mode)
|
|
{
|
|
for (int i = 0; i < UART_NUM; ++i) {
|
|
s_ctx[i]->tx_mode = mode;
|
|
}
|
|
}
|
|
|
|
void esp_vfs_dev_uart_use_nonblocking(int uart_num)
|
|
{
|
|
_lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
|
|
_lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
|
|
s_ctx[uart_num]->tx_func = uart_tx_char;
|
|
s_ctx[uart_num]->rx_func = uart_rx_char;
|
|
_lock_release_recursive(&s_ctx[uart_num]->write_lock);
|
|
_lock_release_recursive(&s_ctx[uart_num]->read_lock);
|
|
}
|
|
|
|
void esp_vfs_dev_uart_use_driver(int uart_num)
|
|
{
|
|
_lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
|
|
_lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
|
|
s_ctx[uart_num]->tx_func = uart_tx_char_via_driver;
|
|
s_ctx[uart_num]->rx_func = uart_rx_char_via_driver;
|
|
_lock_release_recursive(&s_ctx[uart_num]->write_lock);
|
|
_lock_release_recursive(&s_ctx[uart_num]->read_lock);
|
|
}
|