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https://github.com/espressif/esp-idf.git
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75 lines
2.2 KiB
C
75 lines
2.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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//Commands for PSRAM chip
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#pragma once
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#include "soc/io_mux_reg.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define PSRAM_READ 0x03
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#define PSRAM_FAST_READ 0x0B
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#define PSRAM_FAST_READ_QUAD 0xEB
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#define PSRAM_WRITE 0x02
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#define PSRAM_QUAD_WRITE 0x38
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#define PSRAM_ENTER_QMODE 0x35
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#define PSRAM_EXIT_QMODE 0xF5
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#define PSRAM_RESET_EN 0x66
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#define PSRAM_RESET 0x99
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#define PSRAM_SET_BURST_LEN 0xC0
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#define PSRAM_DEVICE_ID 0x9F
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#define PSRAM_FAST_READ_DUMMY 4
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#define PSRAM_FAST_READ_QUAD_DUMMY 6
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// ID
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#define PSRAM_ID_KGD_M 0xff
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#define PSRAM_ID_KGD_S 8
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#define PSRAM_ID_KGD 0x5d
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#define PSRAM_ID_EID_M 0xff
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#define PSRAM_ID_EID_S 16
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// Use the [7:5](bit7~bit5) of EID to distinguish the psram size:
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//
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// BIT7 | BIT6 | BIT5 | SIZE(MBIT)
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// -------------------------------------
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// 0 | 0 | 0 | 16
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// 0 | 0 | 1 | 32
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// 0 | 1 | 0 | 64
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#define PSRAM_EID_SIZE_M 0x07
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#define PSRAM_EID_SIZE_S 5
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#define PSRAM_KGD(id) (((id) >> PSRAM_ID_KGD_S) & PSRAM_ID_KGD_M)
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#define PSRAM_EID(id) (((id) >> PSRAM_ID_EID_S) & PSRAM_ID_EID_M)
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#define PSRAM_SIZE_ID(id) ((PSRAM_EID(id) >> PSRAM_EID_SIZE_S) & PSRAM_EID_SIZE_M)
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#define PSRAM_IS_VALID(id) (PSRAM_KGD(id) == PSRAM_ID_KGD)
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#define PSRAM_IS_64MBIT_TRIAL(id) (PSRAM_EID(id) == 0x26)
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#define PSRAM_IS_2T_APS3204(id) ((((id) >> 21) && 0xfffff) == 1)
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// IO-pins for PSRAM.
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// PSRAM clock and cs IO should be configured based on hardware design.
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#define PSRAM_CLK_IO SPI_CLK_GPIO_NUM
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#define PSRAM_CS_IO SPI_CS1_GPIO_NUM
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#define PSRAM_SPIQ_SD0_IO SPI_Q_GPIO_NUM
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#define PSRAM_SPID_SD1_IO SPI_D_GPIO_NUM
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#define PSRAM_SPIWP_SD3_IO SPI_WP_GPIO_NUM
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#define PSRAM_SPIHD_SD2_IO SPI_HD_GPIO_NUM
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#define PSRAM_CMD_LENGTH 8
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#define PSRAM_ADDR_LENGTH 24
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#define PSRAM_CS_HOLD_VAL 1
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#define PSRAM_CS_SETUP_VAL 1
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#ifdef __cplusplus
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}
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#endif
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