mirror of
https://github.com/espressif/esp-idf.git
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a0bb9b2f57
This commit adds the feature where the TWAI ISR will continue to run even if the cache is disabled. Whilst cache is disabled, any received messages will go into the RX queue, and any pending TX messages in the TX queue will be transmitted. This feature should be enabled using the CONFIG_TWAI_ISR_IN_IRAM option.
123 lines
5.2 KiB
Plaintext
123 lines
5.2 KiB
Plaintext
menu "Driver configurations"
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menu "ADC configuration"
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config ADC_FORCE_XPD_FSM
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bool "Use the FSM to control ADC power"
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default n
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help
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ADC power can be controlled by the FSM instead of software. This allows the ADC to
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be shut off when it is not working leading to lower power consumption. However
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using the FSM control ADC power will increase the noise of ADC.
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config ADC_DISABLE_DAC
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bool "Disable DAC when ADC2 is used on GPIO 25 and 26"
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default y
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help
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If this is set, the ADC2 driver will disable the output of the DAC corresponding to the specified
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channel. This is the default value.
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For testing, disable this option so that we can measure the output of DAC by internal ADC.
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endmenu # ADC Configuration
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menu "SPI configuration"
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config SPI_MASTER_IN_IRAM
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bool "Place transmitting functions of SPI master into IRAM"
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default n
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select SPI_MASTER_ISR_IN_IRAM
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help
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Normally only the ISR of SPI master is placed in the IRAM, so that it
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can work without the flash when interrupt is triggered.
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For other functions, there's some possibility that the flash cache
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miss when running inside and out of SPI functions, which may increase
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the interval of SPI transactions.
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Enable this to put ``queue_trans``, ``get_trans_result`` and
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``transmit`` functions into the IRAM to avoid possible cache miss.
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During unit test, this is enabled to measure the ideal case of api.
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config SPI_MASTER_ISR_IN_IRAM
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bool "Place SPI master ISR function into IRAM"
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default y
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help
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Place the SPI master ISR in to IRAM to avoid possible cache miss.
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Also you can forbid the ISR being disabled during flash writing
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access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
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config SPI_SLAVE_IN_IRAM
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bool "Place transmitting functions of SPI slave into IRAM"
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default n
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select SPI_SLAVE_ISR_IN_IRAM
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help
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Normally only the ISR of SPI slave is placed in the IRAM, so that it
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can work without the flash when interrupt is triggered.
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For other functions, there's some possibility that the flash cache
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miss when running inside and out of SPI functions, which may increase
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the interval of SPI transactions.
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Enable this to put ``queue_trans``, ``get_trans_result`` and
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``transmit`` functions into the IRAM to avoid possible cache miss.
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config SPI_SLAVE_ISR_IN_IRAM
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bool "Place SPI slave ISR function into IRAM"
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default y
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help
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Place the SPI slave ISR in to IRAM to avoid possible cache miss.
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Also you can forbid the ISR being disabled during flash writing
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access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
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endmenu # SPI Configuration
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menu "TWAI configuration"
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config TWAI_ISR_IN_IRAM
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bool "Place TWAI ISR function into IRAM"
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default n
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select FREERTOS_SUPPORT_STATIC_ALLOCATION
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# We need to enable FREERTOS_SUPPORT_STATIC_ALLOCATION because the
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# TWAI driver requires the use of FreeRTOS Queues and Semaphores from
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# the driver ISR. These Queues and Semaphores need to be placed in
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# DRAM thus FreeRTOS static allocation API is required.
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help
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Place the TWAI ISR in to IRAM. This will allow the ISR to avoid
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cache misses, and also be able to run whilst the cache is disabled
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(such as when writing to SPI Flash).
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Note that if this option is enabled:
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- Users should also set the ESP_INTR_FLAG_IRAM in the driver
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configuration structure when installing the driver (see docs for
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specifics).
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- Alert logging (i.e., setting of the TWAI_ALERT_AND_LOG flag)
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will have no effect.
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endmenu # TWAI Configuration
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menu "UART configuration"
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config UART_ISR_IN_IRAM
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bool "Place UART ISR function into IRAM"
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default n
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help
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If this option is not selected, UART interrupt will be disabled for a long time and
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may cause data lost when doing spi flash operation.
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endmenu # UART Configuration
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menu "RTCIO configuration"
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visible if IDF_TARGET_ESP32
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config RTCIO_SUPPORT_RTC_GPIO_DESC
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bool "Support array `rtc_gpio_desc` for ESP32"
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depends on IDF_TARGET_ESP32
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default n
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help
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The the array `rtc_gpio_desc` will don't compile by default.
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If this option is selected, the array `rtc_gpio_desc` can be compile.
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If user use this array, please enable this configuration.
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endmenu # RTCIO Configuration
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endmenu # Driver configurations
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