mirror of
https://github.com/espressif/esp-idf.git
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333553caf2
fix(hal/include): fix header violations in hal component fix(hal/include): Move type definitions from `xx_hal.h` to `xx_types.h` fix(hal/include): Move type definitions from `xx_hal.h` to `xx_types.h` fix(hal/include): Add comment for a far away `#endif` fix(hal/include): change scope for cpp guard ci: Remove components/hal/ comment from public headers check exceptions Add missing include macro sdkconfig.h for header files Add missing include macro stdbool.h for header files Add missing include macro stdint.h for header files Add missing capability guard macro for header files Add missing cpp guard macro for header files Remove some useless include macros Add some missing `inline` attribute for functions defined in header files Remove components/hal/ from public headers check exceptions fix(hal/include): fix invalid licenses fix(hal/include): fix invalid licenses fix(hal/include): add missing soc_caps.h fix(hal): include soc_caps.h before cap macro is used fix(hal): Remove unnecessary target check fix(hal): fix header and macro problems Add missing include macro Remove loop dependency in hal Add comment for far-away endif fix(hal): Add missing soc_caps.h ci: update check_copyright_ignore.txt Change the sequence of `#include` macro, cpp guard macro Change the wrap scope of capacity macro fix(hal): Change position of C++ guard to pass test
127 lines
2.5 KiB
C
127 lines
2.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for AES
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#include "hal/aes_hal.h"
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#include "hal/aes_ll.h"
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#include <stdlib.h>
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#include <string.h>
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#include "soc/soc_caps.h"
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uint8_t aes_hal_setkey(const uint8_t *key, size_t key_bytes, int mode)
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{
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aes_ll_set_mode(mode, key_bytes);
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uint8_t key_bytes_in_hardware = aes_ll_write_key(key, key_bytes / 4);
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/* Used for fault injection check: all words of key data should have been written to hardware */
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return key_bytes_in_hardware;
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}
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/**
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* @brief Busy wait until the AES accelerator is idle
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*
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*/
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static inline void aes_hal_wait_idle(void)
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{
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while (aes_ll_get_state() != ESP_AES_STATE_IDLE) {
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}
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}
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void aes_hal_transform_block(const void *input_block, void *output_block)
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{
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aes_ll_write_block(input_block);
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aes_ll_start_transform();
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aes_hal_wait_idle();
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aes_ll_read_block(output_block);
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}
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#if SOC_AES_SUPPORT_DMA
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void aes_hal_transform_dma_start(size_t num_blocks)
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{
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aes_ll_dma_enable(true);
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/* Write the number of blocks */
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aes_ll_set_num_blocks(num_blocks);
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/* Start encrypting/decrypting */
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aes_ll_start_transform();
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}
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void aes_hal_transform_dma_finish(void)
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{
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aes_ll_dma_exit();
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aes_ll_dma_enable(false);
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}
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void aes_hal_mode_init(esp_aes_mode_t mode)
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{
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/* Set the algorith mode CBC, CFB ... */
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aes_ll_set_block_mode(mode);
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/* Presently hard-coding the INC function to 32 bit */
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if (mode == ESP_AES_BLOCK_MODE_CTR) {
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aes_ll_set_inc();
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}
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}
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void aes_hal_set_iv(const uint8_t *iv)
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{
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aes_ll_set_iv(iv);
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}
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void aes_hal_read_iv(uint8_t *iv)
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{
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aes_ll_read_iv(iv);
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}
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void aes_hal_wait_done()
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{
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while (aes_ll_get_state() != ESP_AES_STATE_DONE) {}
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}
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#endif //SOC_AES_SUPPORT_DMA
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#if SOC_AES_SUPPORT_GCM
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void aes_hal_gcm_calc_hash(uint8_t *gcm_hash)
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{
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aes_ll_dma_enable(true);
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aes_ll_start_transform();
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aes_hal_wait_idle();
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aes_ll_gcm_read_hash(gcm_hash);
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}
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void aes_hal_transform_dma_gcm_start(size_t num_blocks)
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{
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/* Write the number of blocks */
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aes_ll_set_num_blocks(num_blocks);
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/* Start encrypting/decrypting */
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aes_ll_cont_transform();
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}
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void aes_hal_gcm_init(size_t aad_num_blocks, size_t num_valid_bit)
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{
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aes_ll_gcm_set_aad_num_blocks(aad_num_blocks);
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aes_ll_gcm_set_num_valid_bit(num_valid_bit);
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}
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void aes_hal_gcm_read_tag(uint8_t *tag, size_t tag_len)
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{
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uint8_t tag_res[TAG_BYTES];
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aes_ll_gcm_read_tag(tag_res);
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memcpy(tag, tag_res, tag_len);
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}
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#endif //SOC_AES_SUPPORT_GCM
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