mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
46b5363e39
Also refactored the init code to make the logic of device (CS) acquiring more centralized. Resolves: https://github.com/espressif/esp-idf/issues/8556
381 lines
12 KiB
C
381 lines
12 KiB
C
/*
|
|
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#include "sdkconfig.h"
|
|
#include "esp_flash.h"
|
|
#include "memspi_host_driver.h"
|
|
#include "esp_flash_spi_init.h"
|
|
#include "driver/gpio.h"
|
|
#include "esp_rom_gpio.h"
|
|
#include "esp_rom_efuse.h"
|
|
#include "esp_log.h"
|
|
#include "esp_heap_caps.h"
|
|
#include "hal/spi_types.h"
|
|
#include "driver/spi_common_internal.h"
|
|
#include "hal/spi_flash_hal.h"
|
|
#include "hal/gpio_hal.h"
|
|
#include "esp_flash_internal.h"
|
|
#include "esp_rom_gpio.h"
|
|
#include "esp_private/spi_flash_os.h"
|
|
#include "esp_rom_spiflash.h"
|
|
|
|
__attribute__((unused)) static const char TAG[] = "spi_flash";
|
|
|
|
/* This pointer is defined in ROM and extern-ed on targets where CONFIG_SPI_FLASH_ROM_IMPL = y*/
|
|
#if !CONFIG_SPI_FLASH_ROM_IMPL
|
|
esp_flash_t *esp_flash_default_chip = NULL;
|
|
#endif
|
|
|
|
#ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
|
|
|
|
#ifdef CONFIG_ESPTOOLPY_FLASHFREQ_80M
|
|
#define DEFAULT_FLASH_SPEED ESP_FLASH_80MHZ
|
|
#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_40M
|
|
#define DEFAULT_FLASH_SPEED ESP_FLASH_40MHZ
|
|
#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_26M
|
|
#define DEFAULT_FLASH_SPEED ESP_FLASH_26MHZ
|
|
#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_20M
|
|
#define DEFAULT_FLASH_SPEED ESP_FLASH_20MHZ
|
|
#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_120M
|
|
#define DEFAULT_FLASH_SPEED ESP_FLASH_120MHZ
|
|
#else
|
|
#error Flash frequency not defined! Check the ``CONFIG_ESPTOOLPY_FLASHFREQ_*`` options.
|
|
#endif
|
|
|
|
#if defined(CONFIG_ESPTOOLPY_FLASHMODE_QIO)
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_QIO
|
|
#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_QOUT)
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_QOUT
|
|
#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DIO)
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_DIO
|
|
#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DOUT)
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_DOUT
|
|
#elif defined(CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR)
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_OPI_STR
|
|
#elif defined(CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR)
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_OPI_DTR
|
|
#else
|
|
#define DEFAULT_FLASH_MODE SPI_FLASH_FASTRD
|
|
#endif
|
|
|
|
//TODO: modify cs hold to meet requirements of all chips!!!
|
|
#if CONFIG_IDF_TARGET_ESP32
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = false, \
|
|
.input_delay_ns = 0,\
|
|
.cs_setup = 1,\
|
|
}
|
|
#elif CONFIG_IDF_TARGET_ESP32S2
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = true, \
|
|
.input_delay_ns = 0,\
|
|
.cs_setup = 1,\
|
|
}
|
|
#elif CONFIG_IDF_TARGET_ESP32S3
|
|
#include "esp32s3/rom/efuse.h"
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = true, \
|
|
.input_delay_ns = 0,\
|
|
.cs_setup = 1,\
|
|
}
|
|
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
|
|
#if !CONFIG_SPI_FLASH_AUTO_SUSPEND
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = true, \
|
|
.input_delay_ns = 0,\
|
|
.cs_setup = 1,\
|
|
}
|
|
#else
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = true, \
|
|
.input_delay_ns = 0,\
|
|
.auto_sus_en = true,\
|
|
.cs_setup = 1,\
|
|
}
|
|
#endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
|
|
#elif CONFIG_IDF_TARGET_ESP32H2
|
|
#include "esp32h2/rom/efuse.h"
|
|
#if !CONFIG_SPI_FLASH_AUTO_SUSPEND
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = true, \
|
|
.input_delay_ns = 0,\
|
|
}
|
|
#else
|
|
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
|
|
.host_id = SPI1_HOST,\
|
|
.speed = DEFAULT_FLASH_SPEED, \
|
|
.cs_num = 0, \
|
|
.iomux = true, \
|
|
.input_delay_ns = 0,\
|
|
.auto_sus_en = true,\
|
|
}
|
|
#endif //!CONFIG_SPI_FLASH_AUTO_SUSPEND
|
|
#endif
|
|
|
|
|
|
static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_flash_spi_device_config_t *config, bool use_iomux, int cs_id)
|
|
{
|
|
//Not using spicommon_cs_initialize since we don't want to put the whole
|
|
//spi_periph_signal into the DRAM. Copy these data from flash before the
|
|
//cache disabling
|
|
int cs_io_num = config->cs_io_num;
|
|
int spics_in = spi_periph_signal[config->host_id].spics_in;
|
|
int spics_out = spi_periph_signal[config->host_id].spics_out[cs_id];
|
|
int spics_func = spi_periph_signal[config->host_id].func;
|
|
uint32_t iomux_reg = GPIO_PIN_MUX_REG[cs_io_num];
|
|
gpio_hal_context_t gpio_hal = {
|
|
.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
|
|
};
|
|
|
|
//To avoid the panic caused by flash data line conflicts during cs line
|
|
//initialization, disable the cache temporarily
|
|
chip->os_func->start(chip->os_func_data);
|
|
PIN_INPUT_ENABLE(iomux_reg);
|
|
if (use_iomux) {
|
|
gpio_hal_iomux_func_sel(iomux_reg, spics_func);
|
|
} else {
|
|
gpio_hal_output_enable(&gpio_hal, cs_io_num);
|
|
gpio_hal_od_disable(&gpio_hal, cs_io_num);
|
|
esp_rom_gpio_connect_out_signal(cs_io_num, spics_out, false, false);
|
|
if (cs_id == 0) {
|
|
esp_rom_gpio_connect_in_signal(cs_io_num, spics_in, false);
|
|
}
|
|
gpio_hal_iomux_func_sel(iomux_reg, PIN_FUNC_GPIO);
|
|
}
|
|
chip->os_func->end(chip->os_func_data);
|
|
}
|
|
|
|
static bool use_bus_lock(int host_id)
|
|
{
|
|
if (host_id != SPI1_HOST) {
|
|
return true;
|
|
}
|
|
#if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
|
|
return true;
|
|
#else
|
|
return false;
|
|
#endif
|
|
}
|
|
|
|
static esp_err_t acquire_spi_device(const esp_flash_spi_device_config_t *config, int* out_dev_id, spi_bus_lock_dev_handle_t* out_dev_handle)
|
|
{
|
|
esp_err_t ret = ESP_OK;
|
|
int dev_id = -1;
|
|
spi_bus_lock_dev_handle_t dev_handle = NULL;
|
|
|
|
if (use_bus_lock(config->host_id)) {
|
|
spi_bus_lock_handle_t lock = spi_bus_lock_get_by_id(config->host_id);
|
|
spi_bus_lock_dev_config_t config = {.flags = SPI_BUS_LOCK_DEV_FLAG_CS_REQUIRED};
|
|
|
|
ret = spi_bus_lock_register_dev(lock, &config, &dev_handle);
|
|
if (ret == ESP_OK) {
|
|
dev_id = spi_bus_lock_get_dev_id(dev_handle);
|
|
} else if (ret == ESP_ERR_NOT_SUPPORTED) {
|
|
ESP_LOGE(TAG, "No free CS.");
|
|
} else if (ret == ESP_ERR_INVALID_ARG) {
|
|
ESP_LOGE(TAG, "Bus lock not initialized (check CONFIG_SPI_FLASH_SHARE_SPI1_BUS).");
|
|
}
|
|
} else {
|
|
const bool is_main_flash = (config->host_id == SPI1_HOST && config->cs_id == 0);
|
|
if (config->cs_id >= SOC_SPI_PERIPH_CS_NUM(config->host_id) || config->cs_id < 0 || is_main_flash) {
|
|
ESP_LOGE(TAG, "Not valid CS.");
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
} else {
|
|
dev_id = config->cs_id;
|
|
assert(dev_handle == NULL);
|
|
}
|
|
}
|
|
|
|
*out_dev_handle = dev_handle;
|
|
*out_dev_id = dev_id;
|
|
return ret;
|
|
}
|
|
|
|
esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_device_config_t *config)
|
|
{
|
|
if (out_chip == NULL) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
if (!GPIO_IS_VALID_OUTPUT_GPIO(config->cs_io_num)) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
esp_flash_t *chip = NULL;
|
|
memspi_host_inst_t *host = NULL;
|
|
esp_err_t ret = ESP_OK;
|
|
|
|
uint32_t caps = MALLOC_CAP_DEFAULT;
|
|
if (config->host_id == SPI1_HOST) caps = MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT;
|
|
|
|
chip = (esp_flash_t*)heap_caps_malloc(sizeof(esp_flash_t), caps);
|
|
if (!chip) {
|
|
ret = ESP_ERR_NO_MEM;
|
|
goto fail;
|
|
}
|
|
|
|
host = (memspi_host_inst_t*)heap_caps_malloc(sizeof(memspi_host_inst_t), caps);
|
|
*chip = (esp_flash_t) {
|
|
.read_mode = config->io_mode,
|
|
.host = (spi_flash_host_inst_t*)host,
|
|
};
|
|
if (!host) {
|
|
ret = ESP_ERR_NO_MEM;
|
|
goto fail;
|
|
}
|
|
|
|
int dev_id;
|
|
spi_bus_lock_dev_handle_t dev_handle;
|
|
esp_err_t err = acquire_spi_device(config, &dev_id, &dev_handle);
|
|
if (err != ESP_OK) {
|
|
ret = err;
|
|
goto fail;
|
|
}
|
|
|
|
err = esp_flash_init_os_functions(chip, config->host_id, dev_handle);
|
|
if (err != ESP_OK) {
|
|
ret = err;
|
|
goto fail;
|
|
}
|
|
|
|
//avoid conflicts with main flash
|
|
assert(config->host_id != SPI1_HOST || dev_id != 0);
|
|
bool use_iomux = spicommon_bus_using_iomux(config->host_id);
|
|
memspi_host_config_t host_cfg = {
|
|
.host_id = config->host_id,
|
|
.cs_num = dev_id,
|
|
.iomux = use_iomux,
|
|
.input_delay_ns = config->input_delay_ns,
|
|
.speed = config->speed,
|
|
};
|
|
err = memspi_host_init_pointers(host, &host_cfg);
|
|
if (err != ESP_OK) {
|
|
ret = err;
|
|
goto fail;
|
|
}
|
|
|
|
// The cs_id inside `config` is deprecated, use the `dev_id` provided by the bus lock instead.
|
|
cs_initialize(chip, config, use_iomux, dev_id);
|
|
*out_chip = chip;
|
|
return ret;
|
|
fail:
|
|
// The memory allocated are free'd in the `spi_bus_remove_flash_device`.
|
|
spi_bus_remove_flash_device(chip);
|
|
return ret;
|
|
}
|
|
|
|
esp_err_t spi_bus_remove_flash_device(esp_flash_t *chip)
|
|
{
|
|
if (chip==NULL) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
|
|
spi_bus_lock_dev_handle_t dev_handle = NULL;
|
|
esp_flash_deinit_os_functions(chip, &dev_handle);
|
|
if (dev_handle) {
|
|
spi_bus_lock_unregister_dev(dev_handle);
|
|
}
|
|
free(chip->host);
|
|
free(chip);
|
|
return ESP_OK;
|
|
}
|
|
|
|
/* The default (ie initial boot) no-OS ROM esp_flash_os_functions_t */
|
|
extern const esp_flash_os_functions_t esp_flash_noos_functions;
|
|
|
|
static DRAM_ATTR memspi_host_inst_t esp_flash_default_host;
|
|
|
|
static DRAM_ATTR esp_flash_t default_chip = {
|
|
.read_mode = DEFAULT_FLASH_MODE,
|
|
.host = (spi_flash_host_inst_t*)&esp_flash_default_host,
|
|
.os_func = &esp_flash_noos_functions,
|
|
};
|
|
|
|
extern esp_err_t esp_flash_suspend_cmd_init(esp_flash_t* chip);
|
|
esp_err_t esp_flash_init_default_chip(void)
|
|
{
|
|
const esp_rom_spiflash_chip_t *legacy_chip = &g_rom_flashchip;
|
|
memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT();
|
|
|
|
#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32C2
|
|
// For esp32s2 spi IOs are configured as from IO MUX by default
|
|
cfg.iomux = esp_rom_efuse_get_flash_gpio_info() == 0 ? true : false;
|
|
#endif
|
|
|
|
#if CONFIG_ESPTOOLPY_OCT_FLASH
|
|
cfg.octal_mode_en = 1;
|
|
cfg.default_io_mode = DEFAULT_FLASH_MODE;
|
|
#endif
|
|
|
|
// For chips need time tuning, get value directely from system here.
|
|
#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
|
|
if (spi_timing_is_tuned()) {
|
|
cfg.using_timing_tuning = 1;
|
|
spi_timing_get_flash_timing_param(&cfg.timing_reg);
|
|
}
|
|
#endif // SOC_SPI_MEM_SUPPORT_TIME_TUNING
|
|
|
|
//the host is already initialized, only do init for the data and load it to the host
|
|
esp_err_t err = memspi_host_init_pointers(&esp_flash_default_host, &cfg);
|
|
if (err != ESP_OK) {
|
|
return err;
|
|
}
|
|
|
|
// ROM TODO: account for non-standard default pins in efuse
|
|
// ROM TODO: to account for chips which are slow to power on, maybe keep probing in a loop here
|
|
err = esp_flash_init_main(&default_chip);
|
|
if (err != ESP_OK) {
|
|
return err;
|
|
}
|
|
if (default_chip.size < legacy_chip->chip_size) {
|
|
ESP_EARLY_LOGE(TAG, "Detected size(%dk) smaller than the size in the binary image header(%dk). Probe failed.", default_chip.size/1024, legacy_chip->chip_size/1024);
|
|
return ESP_ERR_FLASH_SIZE_NOT_MATCH;
|
|
}
|
|
|
|
if (default_chip.size > legacy_chip->chip_size) {
|
|
ESP_EARLY_LOGW(TAG, "Detected size(%dk) larger than the size in the binary image header(%dk). Using the size in the binary image header.", default_chip.size/1024, legacy_chip->chip_size/1024);
|
|
}
|
|
default_chip.size = legacy_chip->chip_size;
|
|
|
|
esp_flash_default_chip = &default_chip;
|
|
#ifdef CONFIG_SPI_FLASH_AUTO_SUSPEND
|
|
err = esp_flash_suspend_cmd_init(&default_chip);
|
|
if (err != ESP_OK) {
|
|
return err;
|
|
}
|
|
#endif
|
|
return ESP_OK;
|
|
}
|
|
|
|
esp_err_t esp_flash_app_init(void)
|
|
{
|
|
esp_err_t err = ESP_OK;
|
|
#if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
|
|
err = esp_flash_init_main_bus_lock();
|
|
if (err != ESP_OK) return err;
|
|
#endif
|
|
err = esp_flash_app_enable_os_functions(&default_chip);
|
|
return err;
|
|
}
|
|
|
|
#endif //!CONFIG_SPI_FLASH_USE_LEGACY_IMPL
|