esp-idf/components/soc
Michael (XIAO Xufeng) 0ce1c1b494 Merge branch 'feature/add_new_pkg_and_flash_psram_efuses_v5.0' into 'release/v5.0'
feat(efuse): Add flash&psram efuses for S3 (v5.0)

See merge request espressif/esp-idf!29144
2024-03-05 10:47:08 +08:00
..
esp32 Merge branch 'bugfix/fix_onebyte_watchpoint_setting_v5.0' into 'release/v5.0' 2023-12-15 19:29:57 +08:00
esp32c2 fix(esp_coex): add support_coexistence soc_caps for esp32c2 2024-02-23 16:41:52 +08:00
esp32c3 fix(i2s): fixed incorrect reg base name on C3 2024-01-23 12:07:50 +08:00
esp32h2 fix(i2s): fixed incorrect reg base name on C3 2024-01-23 12:07:50 +08:00
esp32s2 Merge branch 'fix/usb_host_soc_caps_backport_v5.0' into 'release/v5.0' 2023-12-22 17:15:50 +08:00
esp32s3 feat(efuse): Add flash&psram efuses for S3 2024-02-22 11:40:33 +02:00
include/soc soc: Move revision MAX/MIN static assert to esp_hw_support 2023-07-28 11:36:20 +02:00
linux/include/soc build-system: include soc_caps defines into kconfig 2021-12-06 12:37:07 +08:00
CMakeLists.txt g0: resolve MMU_PAGE_SIZE not defined in g0 build issue 2023-02-23 12:35:52 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig g0: resolve MMU_PAGE_SIZE not defined in g0 build issue 2023-02-23 12:35:52 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware