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79 lines
2.3 KiB
C
79 lines
2.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "soc/soc_caps.h"
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#include "hal/xt_wdt_hal.h"
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#include "hal/xt_wdt_ll.h"
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#include "hal/assert.h"
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#define DIV_COMP_N_MAX 8
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static uint32_t xt_wdt_hal_calculate(uint32_t rtc_clk_frequency_khz)
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{
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uint32_t xtal32k_clk_factor = 0;
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uint8_t divisor_comps[DIV_COMP_N_MAX];
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/* From the TRM:
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Define the frequency of RTC_CLK as f_rtc_clk (unit: kHz), and the eight divisor components as
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x0, x1, x2, x3, x4, x5, x6, and x7, respectively. S = x0 + x1 + x2 + x3 + x4 + x5 + x6 + x7.
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The following conditions should be fulfilled:
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S = f_rtc_clk * (4/32)
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M + 1 >= xn >= M(0 <= n <= 7)
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M = f_rtc_clk/32/2
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xn should be an integer. M and S are rounded up or down. Each divisor component (x0 ~x7) is 4-bit long, and
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corresponds to the value of RTC_CNTL_XTAL32K_CLK_FACTOR (32-bit) in order.
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*/
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uint8_t M = ((rtc_clk_frequency_khz / 32) / 2);
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uint32_t S = ((4 * rtc_clk_frequency_khz) / 32);
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memset(divisor_comps, M, DIV_COMP_N_MAX);
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/* Calculate how far we are away from satisfying S = SUM(x_n) */
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uint8_t off = S - DIV_COMP_N_MAX * M;
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/* Offset should never be this big */
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HAL_ASSERT(off <= DIV_COMP_N_MAX);
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for (int i = 0; i < DIV_COMP_N_MAX; i++) {
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if (off) {
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divisor_comps[i]++;
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off--;
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}
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/* Sum up all divisors */
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xtal32k_clk_factor |= (divisor_comps[i] << 4 * i);
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}
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return xtal32k_clk_factor;
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}
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void xt_wdt_hal_init(xt_wdt_hal_context_t *hal, const xt_wdt_hal_config_t *config)
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{
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hal->dev = &RTCCNTL;
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xt_wdt_ll_enable(hal->dev, false);
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xt_wdt_ll_set_timeout(hal->dev, config->timeout);
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}
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uint32_t xt_wdt_hal_enable_backup_clk(xt_wdt_hal_context_t *hal, uint32_t rtc_clk_frequency_khz)
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{
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uint32_t xtal32k_clk_factor = xt_wdt_hal_calculate(rtc_clk_frequency_khz);
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xt_wdt_ll_set_backup_clk_factor(hal->dev, xtal32k_clk_factor);
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xt_wdt_ll_auto_backup_enable(hal->dev, true);
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return xtal32k_clk_factor;
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}
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void xt_wdt_hal_enable(xt_wdt_hal_context_t *hal, bool enable)
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{
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xt_wdt_ll_enable(hal->dev, enable);
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xt_wdt_ll_intr_enable(hal->dev, enable);
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}
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