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https://github.com/espressif/esp-idf.git
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434 lines
16 KiB
C
434 lines
16 KiB
C
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include <stdlib.h>
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#include <sys/cdefs.h>
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#include "esp_log.h"
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#include "esp_eth.h"
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#include "eth_phy_regs_struct.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "driver/gpio.h"
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static const char *TAG = "lan8720";
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#define PHY_CHECK(a, str, goto_tag, ...) \
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do \
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{ \
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if (!(a)) \
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{ \
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ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
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goto goto_tag; \
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} \
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} while (0)
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/***************Vendor Specific Register***************/
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/**
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* @brief MCSR(Mode Control Status Register)
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*
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*/
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typedef union {
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struct {
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uint32_t reserved1 : 1; /* Reserved */
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uint32_t energy_is_on : 1; /* Energy is On */
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uint32_t reserved2 : 4; /* Reserved */
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uint32_t en_alternate_interrupt : 1; /* Enable Alternate Interrupt Mode */
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uint32_t reserved3 : 2; /* Reserved */
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uint32_t en_far_loopback : 1; /* Enable Far Loopback Mode */
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uint32_t reserved4 : 3; /* Reserved */
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uint32_t en_energy_detect_powerdown : 1; /* Enable Energy Detect Power Down */
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uint32_t reserved5 : 2; /* Reserved */
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};
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uint32_t val;
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} mcsr_reg_t;
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#define ETH_PHY_MCSR_REG_ADDR (0x11)
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/**
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* @brief SMR(Special Modes Register)
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*
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*/
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typedef union {
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struct {
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uint32_t phy_addr : 5; /* PHY Address */
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uint32_t mode : 3; /* Transceiver Mode of Operation */
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uint32_t reserved : 8; /* Reserved */
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};
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uint32_t val;
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} smr_reg_t;
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#define ETH_PHY_SMR_REG_ADDR (0x12)
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/**
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* @brief SECR(Symbol Error Counter Register)
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*
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*/
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typedef union {
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struct {
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uint32_t symbol_err_count : 16; /* Symbol Error Counter */
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};
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uint32_t val;
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} secr_reg_t;
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#define EHT_PHY_SECR_REG_ADDR (0x1A)
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/**
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* @brief CSIR(Control Status Indications Register)
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*
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*/
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typedef union {
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struct {
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uint32_t reserved1 : 4; /* Reserved */
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uint32_t base10_t_polarity : 1; /* Polarity State of 10Base-T */
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uint32_t reserved2 : 6; /* Reserved */
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uint32_t dis_sqe : 1; /* Disable SQE test(Heartbeat) */
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uint32_t reserved3 : 1; /* Reserved */
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uint32_t select_channel : 1; /* Manual channel select:MDI(0) or MDIX(1) */
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uint32_t reserved4 : 1; /* Reserved */
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uint32_t auto_mdix_ctrl : 1; /* Auto-MDIX Control: EN(0) or DE(1) */
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};
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uint32_t val;
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} scsir_reg_t;
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#define ETH_PHY_CSIR_REG_ADDR (0x1B)
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/**
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* @brief ISR(Interrupt Source Register)
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*
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*/
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typedef union {
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struct {
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uint32_t reserved1 : 1; /* Reserved */
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uint32_t auto_nego_page_received : 1; /* Auto-Negotiation Page Received */
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uint32_t parallel_detect_falut : 1; /* Parallel Detection Fault */
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uint32_t auto_nego_lp_acknowledge : 1; /* Auto-Negotiation LP Acknowledge */
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uint32_t link_down : 1; /* Link Down */
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uint32_t remote_fault_detect : 1; /* Remote Fault Detect */
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uint32_t auto_nego_complete : 1; /* Auto-Negotiation Complete */
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uint32_t energy_on_generate : 1; /* ENERYON generated */
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uint32_t reserved2 : 8; /* Reserved */
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};
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uint32_t val;
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} isfr_reg_t;
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#define ETH_PHY_ISR_REG_ADDR (0x1D)
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/**
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* @brief IMR(Interrupt Mask Register)
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*
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*/
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typedef union {
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struct {
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uint32_t reserved1 : 1; /* Reserved */
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uint32_t auto_nego_page_received : 1; /* Auto-Negotiation Page Received */
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uint32_t parallel_detect_falut : 1; /* Parallel Detection Fault */
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uint32_t auto_nego_lp_acknowledge : 1; /* Auto-Negotiation LP Acknowledge */
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uint32_t link_down : 1; /* Link Down */
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uint32_t remote_fault_detect : 1; /* Remote Fault Detect */
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uint32_t auto_nego_complete : 1; /* Auto-Negotiation Complete */
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uint32_t energy_on_generate : 1; /* ENERYON generated */
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uint32_t reserved2 : 8; /* Reserved */
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};
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uint32_t val;
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} imr_reg_t;
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#define ETH_PHY_IMR_REG_ADDR (0x1E)
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/**
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* @brief PSCSR(PHY Special Control Status Register)
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*
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*/
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typedef union {
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struct {
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uint32_t reserved1 : 2; /* Reserved */
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uint32_t speed_indication : 3; /* Speed Indication */
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uint32_t reserved2 : 7; /* Reserved */
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uint32_t auto_nego_done : 1; /* Auto Negotiation Done */
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uint32_t reserved3 : 3; /* Reserved */
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};
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uint32_t val;
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} pscsr_reg_t;
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#define ETH_PHY_PSCSR_REG_ADDR (0x1F)
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typedef struct {
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esp_eth_phy_t parent;
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esp_eth_mediator_t *eth;
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uint32_t addr;
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uint32_t reset_timeout_ms;
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uint32_t autonego_timeout_ms;
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eth_link_t link_status;
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int reset_gpio_num;
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} phy_lan8720_t;
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static esp_err_t lan8720_update_link_duplex_speed(phy_lan8720_t *lan8720)
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{
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esp_eth_mediator_t *eth = lan8720->eth;
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eth_speed_t speed = ETH_SPEED_10M;
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eth_duplex_t duplex = ETH_DUPLEX_HALF;
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bmsr_reg_t bmsr;
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pscsr_reg_t pscsr;
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_BMSR_REG_ADDR, &(bmsr.val)) == ESP_OK,
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"read BMSR failed", err);
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eth_link_t link = bmsr.link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
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/* check if link status changed */
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if (lan8720->link_status != link) {
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/* when link up, read negotiation result */
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if (link == ETH_LINK_UP) {
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_PSCSR_REG_ADDR, &(pscsr.val)) == ESP_OK,
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"read PSCSR failed", err);
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switch (pscsr.speed_indication) {
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case 1: //10Base-T half-duplex
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speed = ETH_SPEED_10M;
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duplex = ETH_DUPLEX_HALF;
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break;
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case 2: //100Base-TX half-duplex
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speed = ETH_SPEED_100M;
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duplex = ETH_DUPLEX_HALF;
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break;
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case 5: //10Base-T full-duplex
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speed = ETH_SPEED_10M;
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duplex = ETH_DUPLEX_FULL;
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break;
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case 6: //100Base-TX full-duplex
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speed = ETH_SPEED_100M;
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duplex = ETH_DUPLEX_FULL;
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break;
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default:
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break;
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}
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PHY_CHECK(eth->on_state_changed(eth, ETH_STATE_SPEED, (void *)speed) == ESP_OK,
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"change speed failed", err);
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PHY_CHECK(eth->on_state_changed(eth, ETH_STATE_DUPLEX, (void *)duplex) == ESP_OK,
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"change duplex failed", err);
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}
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PHY_CHECK(eth->on_state_changed(eth, ETH_STATE_LINK, (void *)link) == ESP_OK,
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"change link failed", err);
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lan8720->link_status = link;
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}
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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static esp_err_t lan8720_set_mediator(esp_eth_phy_t *phy, esp_eth_mediator_t *eth)
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{
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PHY_CHECK(eth, "can't set mediator to null", err);
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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lan8720->eth = eth;
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return ESP_OK;
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err:
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return ESP_ERR_INVALID_ARG;
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}
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static esp_err_t lan8720_get_link(esp_eth_phy_t *phy)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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/* Updata information about link, speed, duplex */
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PHY_CHECK(lan8720_update_link_duplex_speed(lan8720) == ESP_OK, "update link duplex speed failed", err);
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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static esp_err_t lan8720_reset(esp_eth_phy_t *phy)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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lan8720->link_status = ETH_LINK_DOWN;
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esp_eth_mediator_t *eth = lan8720->eth;
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bmcr_reg_t bmcr = {.reset = 1};
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PHY_CHECK(eth->phy_reg_write(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, bmcr.val) == ESP_OK,
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"write BMCR failed", err);
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/* wait for reset complete */
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uint32_t to = 0;
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for (to = 0; to < lan8720->reset_timeout_ms / 10; to++) {
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vTaskDelay(pdMS_TO_TICKS(10));
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)) == ESP_OK,
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"read BMCR failed", err);
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if (!bmcr.reset) {
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break;
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}
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}
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PHY_CHECK(to < lan8720->reset_timeout_ms / 10, "reset timeout", err);
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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static esp_err_t lan8720_reset_hw(esp_eth_phy_t *phy)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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if (lan8720->reset_gpio_num >= 0) {
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gpio_pad_select_gpio(lan8720->reset_gpio_num);
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gpio_set_direction(lan8720->reset_gpio_num, GPIO_MODE_OUTPUT);
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gpio_set_level(lan8720->reset_gpio_num, 0);
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ets_delay_us(100); // insert min input assert time
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gpio_set_level(lan8720->reset_gpio_num, 1);
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}
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return ESP_OK;
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}
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static esp_err_t lan8720_negotiate(esp_eth_phy_t *phy)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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esp_eth_mediator_t *eth = lan8720->eth;
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/* Restart auto negotiation */
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bmcr_reg_t bmcr = {
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.speed_select = 1, /* 100Mbps */
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.duplex_mode = 1, /* Full Duplex */
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.en_auto_nego = 1, /* Auto Negotiation */
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.restart_auto_nego = 1 /* Restart Auto Negotiation */
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};
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PHY_CHECK(eth->phy_reg_write(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, bmcr.val) == ESP_OK, "write BMCR failed", err);
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/* Wait for auto negotiation complete */
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bmsr_reg_t bmsr;
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pscsr_reg_t pscsr;
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int32_t to = 0;
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for (to = 0; to < lan8720->autonego_timeout_ms / 10; to++) {
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vTaskDelay(pdMS_TO_TICKS(10));
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_BMSR_REG_ADDR, &(bmsr.val)) == ESP_OK,
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"read BMSR failed", err);
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_PSCSR_REG_ADDR, &(pscsr.val)) == ESP_OK,
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"read PSCSR failed", err);
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if (bmsr.auto_nego_complete && pscsr.auto_nego_done) {
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break;
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}
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}
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/* Auto negotiation failed, maybe no network cable plugged in, so output a warning */
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if (to >= lan8720->autonego_timeout_ms / 10) {
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ESP_LOGW(TAG, "auto negotiation timeout");
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}
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/* Updata information about link, speed, duplex */
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PHY_CHECK(lan8720_update_link_duplex_speed(lan8720) == ESP_OK, "update link duplex speed failed", err);
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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static esp_err_t lan8720_pwrctl(esp_eth_phy_t *phy, bool enable)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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esp_eth_mediator_t *eth = lan8720->eth;
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bmcr_reg_t bmcr;
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)) == ESP_OK,
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"read BMCR failed", err);
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if (!enable) {
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/* General Power Down Mode */
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bmcr.power_down = 1;
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} else {
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/* Normal operation Mode */
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bmcr.power_down = 0;
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}
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PHY_CHECK(eth->phy_reg_write(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, bmcr.val) == ESP_OK,
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"write BMCR failed", err);
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if (!enable) {
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)) == ESP_OK,
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"read BMCR failed", err);
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PHY_CHECK(bmcr.power_down == 1, "power down failed", err);
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} else {
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/* wait for power up complete */
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uint32_t to = 0;
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for (to = 0; to < lan8720->reset_timeout_ms / 10; to++) {
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vTaskDelay(pdMS_TO_TICKS(10));
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)) == ESP_OK,
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"read BMCR failed", err);
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if (bmcr.power_down == 0) {
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break;
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}
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}
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PHY_CHECK(to < lan8720->reset_timeout_ms / 10, "power up timeout", err);
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}
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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static esp_err_t lan8720_set_addr(esp_eth_phy_t *phy, uint32_t addr)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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lan8720->addr = addr;
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return ESP_OK;
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}
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static esp_err_t lan8720_get_addr(esp_eth_phy_t *phy, uint32_t *addr)
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{
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PHY_CHECK(addr, "addr can't be null", err);
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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*addr = lan8720->addr;
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return ESP_OK;
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err:
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return ESP_ERR_INVALID_ARG;
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}
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static esp_err_t lan8720_del(esp_eth_phy_t *phy)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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free(lan8720);
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return ESP_OK;
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}
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static esp_err_t lan8720_init(esp_eth_phy_t *phy)
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{
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phy_lan8720_t *lan8720 = __containerof(phy, phy_lan8720_t, parent);
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esp_eth_mediator_t *eth = lan8720->eth;
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// Detect PHY address
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if (lan8720->addr == ESP_ETH_PHY_ADDR_AUTO) {
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PHY_CHECK(esp_eth_detect_phy_addr(eth, &lan8720->addr) == ESP_OK, "Detect PHY address failed", err);
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}
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/* Power on Ethernet PHY */
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PHY_CHECK(lan8720_pwrctl(phy, true) == ESP_OK, "power control failed", err);
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/* Reset Ethernet PHY */
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PHY_CHECK(lan8720_reset(phy) == ESP_OK, "reset failed", err);
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/* Check PHY ID */
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phyidr1_reg_t id1;
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phyidr2_reg_t id2;
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_IDR1_REG_ADDR, &(id1.val)) == ESP_OK,
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"read ID1 failed", err);
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PHY_CHECK(eth->phy_reg_read(eth, lan8720->addr, ETH_PHY_IDR2_REG_ADDR, &(id2.val)) == ESP_OK,
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"read ID2 failed", err);
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PHY_CHECK(id1.oui_msb == 0x7 && id2.oui_lsb == 0x30 && id2.vendor_model == 0xF, "wrong chip ID", err);
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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static esp_err_t lan8720_deinit(esp_eth_phy_t *phy)
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{
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/* Power off Ethernet PHY */
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PHY_CHECK(lan8720_pwrctl(phy, false) == ESP_OK, "power control failed", err);
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return ESP_OK;
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err:
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return ESP_FAIL;
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}
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esp_eth_phy_t *esp_eth_phy_new_lan8720(const eth_phy_config_t *config)
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{
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PHY_CHECK(config, "can't set phy config to null", err);
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phy_lan8720_t *lan8720 = calloc(1, sizeof(phy_lan8720_t));
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PHY_CHECK(lan8720, "calloc lan8720 failed", err);
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lan8720->addr = config->phy_addr;
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lan8720->reset_gpio_num = config->reset_gpio_num;
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lan8720->reset_timeout_ms = config->reset_timeout_ms;
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lan8720->link_status = ETH_LINK_DOWN;
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lan8720->autonego_timeout_ms = config->autonego_timeout_ms;
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lan8720->parent.reset = lan8720_reset;
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lan8720->parent.reset_hw = lan8720_reset_hw;
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lan8720->parent.init = lan8720_init;
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lan8720->parent.deinit = lan8720_deinit;
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lan8720->parent.set_mediator = lan8720_set_mediator;
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lan8720->parent.negotiate = lan8720_negotiate;
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lan8720->parent.get_link = lan8720_get_link;
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lan8720->parent.pwrctl = lan8720_pwrctl;
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lan8720->parent.get_addr = lan8720_get_addr;
|
|
lan8720->parent.set_addr = lan8720_set_addr;
|
|
lan8720->parent.del = lan8720_del;
|
|
|
|
return &(lan8720->parent);
|
|
err:
|
|
return NULL;
|
|
}
|