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73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for LEDC (common part)
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#include "esp_attr.h"
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#include "hal/ledc_hal.h"
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#include "soc/soc_caps.h"
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#include "sdkconfig.h"
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#include "hal/assert.h"
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#include "esp_rom_sys.h"
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void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode)
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{
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//Get hardware instance.
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hal->dev = LEDC_LL_GET_HW();
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hal->speed_mode = speed_mode;
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}
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void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
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{
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/* Use the following variable to retrieve the clock source used by the LEDC
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* hardware controller. */
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ledc_clk_src_t clk_src;
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/* Clock configuration to return to the driver. */
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ledc_clk_cfg_t driver_clk = LEDC_AUTO_CLK;
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/* Get the timer-specific mux value. */
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ledc_hal_get_clock_source(hal, timer_sel, &clk_src);
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#if SOC_LEDC_SUPPORT_REF_TICK
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if (clk_src == LEDC_REF_TICK) {
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driver_clk = LEDC_USE_REF_TICK;
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} else
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#endif
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{
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/* If the timer-specific mux is not set to REF_TICK, it either means that:
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* - The controler is in fast mode, and thus using APB clock (driver_clk
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* variable's default value)
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* - The controler is in slow mode and so, using a global clock,
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* so we have to retrieve that clock here.
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*/
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if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
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/* If the source clock used by LEDC hardware is not REF_TICK, it is
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* necessary to retrieve the global clock source used. */
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ledc_slow_clk_sel_t slow_clk;
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ledc_hal_get_slow_clk_sel(hal, &slow_clk);
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driver_clk = (ledc_clk_cfg_t)slow_clk;
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}
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#if SOC_LEDC_SUPPORT_HS_MODE
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else {
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driver_clk = LEDC_USE_APB_CLK;
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}
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#endif
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}
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*clk_cfg = driver_clk;
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}
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#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
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void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
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{
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ledc_ll_set_duty_range_rd_addr(hal->dev, hal->speed_mode, channel_num, range);
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// On ESP32C6/H2, gamma ram read/write has the APB and LEDC clock domain sync issue
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// To make sure the parameter read is from the correct gamma ram addr, add a delay in between to ensure syncronization
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esp_rom_delay_us(5);
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ledc_ll_get_duty_param(hal->dev, hal->speed_mode, channel_num, dir, cycle, scale, step);
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}
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#endif
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