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2c2a62e323
- Support SOC ROOT clock source switch - Support CPU frequency change - Support RTC SLOW clock source switch - Support RTC SLOW clock + RC FAST calibration Remove FPGA build for esp32h2
31 lines
937 B
Plaintext
31 lines
937 B
Plaintext
choice ESP_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP_DEFAULT_CPU_FREQ_MHZ_32 if IDF_ENV_FPGA
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default ESP_DEFAULT_CPU_FREQ_MHZ_96
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help
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CPU frequency to be set on application startup.
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config ESP_DEFAULT_CPU_FREQ_MHZ_16
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bool "16 MHz"
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depends on IDF_ENV_FPGA
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config ESP_DEFAULT_CPU_FREQ_MHZ_32
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bool "32 MHz"
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depends on IDF_ENV_FPGA
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config ESP_DEFAULT_CPU_FREQ_MHZ_48
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bool "48 MHz"
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depends on !IDF_ENV_FPGA
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config ESP_DEFAULT_CPU_FREQ_MHZ_64
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bool "64 MHz"
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config ESP_DEFAULT_CPU_FREQ_MHZ_96
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bool "96 MHz"
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depends on !IDF_ENV_FPGA
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endchoice
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config ESP_DEFAULT_CPU_FREQ_MHZ
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int
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default 16 if ESP_DEFAULT_CPU_FREQ_MHZ_16
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default 32 if ESP_DEFAULT_CPU_FREQ_MHZ_32
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default 48 if ESP_DEFAULT_CPU_FREQ_MHZ_48
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default 64 if ESP_DEFAULT_CPU_FREQ_MHZ_64
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default 96 if ESP_DEFAULT_CPU_FREQ_MHZ_96
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